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AM5728 Datasheet(PDF) 324 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 324 Page - Texas Instruments |
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324 / 415 page  mmc1_clk mmc1_cmd mmc1_dat[3:0] SDR1041 SDR1042L SDR1042H SDR1045 SDR1046 SDR1045 SDR1046 vayu_mmc1_12 mmc1_clk mmc1_cmd mmc1_dat[3:0] vayu_mmc1_11 SDR1041 SDR1042H SDR1042L SDR1043 SDR1044 SDR1048 SDR1047 324 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-100. Switching Characteristics for MMC1 - SD Card SDR104 Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR1041 fop(clk) Operating frequency, mmc1_clk 192 MHz SDR1042 H tw(clkH) Pulse duration, mmc1_clk high 0.5*P- 0.185 (1) ns SDR1042 L tw(clkL) Pulse duration, mmc1_clk low 0.5*P- 0.185 (1) ns SDR1045 td(clkL-cmdV) Delay time, mmc1_clk falling clock edge to mmc1_cmd transition -1.09 0.49 ns SDR1046 td(clkL-dV) Delay time, mmc1_clk falling clock edge to mmc1_dat[3:0] transition -1.09 0.49 ns (1) P = output mmc1_clk period in ns Figure 7-70. MMC/SD/SDIO in - High Speed SDR104 - Receiver Mode Figure 7-71. MMC/SD/SDIO in - High Speed SDR104 - Transmitter Mode 7.23.1.7 UHS-I DDR50, 4-bit data Table 7-101 and Table 7-102 present Timing requirements and Switching characteristics for MMC1 - DDR50 in receiver and transmitter mode (see Figure 7-72 and Figure 7-73). Table 7-101. Timing Requirements for MMC1 - SD Card DDR50 Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT DDR505 tsu(cmdV-clk) Setup time, mmc1_cmd valid before mmc1_clk transition 1.79 ns DDR506 th(clk-cmdV) Hold time, mmc1_cmd valid after mmc1_clk transition 1.6 ns DDR507 tsu(dV-clk) Setup time, mmc1_dat[3:0] valid before mmc1_clk transition Pad Loopback 1.79 ns Internal Loopback 1.79 ns DDR508 th(clk-dV) Hold time, mmc1_dat[3:0] valid after mmc1_clk transition Pad Loopback 1.6 ns Internal Loopback 1.6 ns |
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