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AM5728 Datasheet(PDF) 327 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 327 Page - Texas Instruments

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Copyright © 2015–2019, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics
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Product Folder Links: AM5729 AM5728 AM5726
327
AM5729, AM5728, AM5726
www.ti.com
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
Table 7-104. Manual Functions Mapping for MMC1
BALL
BALL NAME
MMC1_DDR_MANUAL1
MMC1_SDR104_MANUAL1
CFG REGISTER
MUXMODE
A_DELAY (ps)
G_DELAY (ps)
A_DELAY (ps)
G_DELAY (ps)
0
W6
mmc1_clk
1076
330
-
-
CFG_MMC1_CLK_IN
mmc1_clk
W6
mmc1_clk
1271
0
600
400
CFG_MMC1_CLK_OUT
mmc1_clk
Y6
mmc1_cmd
722
0
-
-
CFG_MMC1_CMD_IN
mmc1_cmd
Y6
mmc1_cmd
0
0
0
0
CFG_MMC1_CMD_OEN
mmc1_cmd
Y6
mmc1_cmd
0
0
0
0
CFG_MMC1_CMD_OUT
mmc1_cmd
AA6
mmc1_dat0
751
0
-
-
CFG_MMC1_DAT0_IN
mmc1_dat0
AA6
mmc1_dat0
0
0
0
0
CFG_MMC1_DAT0_OEN
mmc1_dat0
AA6
mmc1_dat0
20
0
30
0
CFG_MMC1_DAT0_OUT
mmc1_dat0
Y4
mmc1_dat1
256
0
-
-
CFG_MMC1_DAT1_IN
mmc1_dat1
Y4
mmc1_dat1
0
0
0
0
CFG_MMC1_DAT1_OEN
mmc1_dat1
Y4
mmc1_dat1
0
0
0
0
CFG_MMC1_DAT1_OUT
mmc1_dat1
AA5
mmc1_dat2
263
0
-
-
CFG_MMC1_DAT2_IN
mmc1_dat2
AA5
mmc1_dat2
0
0
0
0
CFG_MMC1_DAT2_OEN
mmc1_dat2
AA5
mmc1_dat2
0
0
0
0
CFG_MMC1_DAT2_OUT
mmc1_dat2
Y3
mmc1_dat3
0
0
-
-
CFG_MMC1_DAT3_IN
mmc1_dat3
Y3
mmc1_dat3
0
0
0
0
CFG_MMC1_DAT3_OEN
mmc1_dat3
Y3
mmc1_dat3
0
0
0
0
CFG_MMC1_DAT3_OUT
mmc1_dat3
7.23.2 MMC2 — eMMC
MMC2 interface is compliant with the JC64 eMMC Standard v4.5 and it supports the following eMMC applications:
•
Standard JC64 SDR, 8-bit data, half cycle
•
High-speed JC64 SDR, 8-bit data, half cycle
•
High-speed JC64 DDR, 8-bit data
•
High-speed HS200 JC64 SDR, 8-bit data, half cycle
NOTE
For more information, see the eMMC/SD/SDIO chapter of the Device TRM.
7.23.2.1 Standard JC64 SDR, 8-bit data, half cycle
Table 7-105 and Table 7-106 present Timing requirements and Switching characteristics for MMC2 - Standard SDR in receiver and transmitter
mode (see Figure 7-74 and Figure 7-75).



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