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AM5728 Datasheet(PDF) 361 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 361 Page - Texas Instruments |
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361 / 415 page  361 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-157. Manual Functions Mapping for PRU-ICSS1 PRU1 Direct Output mode BALL BALL NAME PR1_PRU1_DIR_OUT_MANUAL CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 13 D3 vin2a_d10 0 1900 CFG_VIN2A_D10_OUT pr1_pru1_gpo7 F6 vin2a_d11 0 2700 CFG_VIN2A_D11_OUT pr1_pru1_gpo8 D5 vin2a_d12 0 3400 CFG_VIN2A_D12_OUT pr1_pru1_gpo9 C2 vin2a_d13 0 3200 CFG_VIN2A_D13_OUT pr1_pru1_gpo10 C3 vin2a_d14 0 3000 CFG_VIN2A_D14_OUT pr1_pru1_gpo11 C4 vin2a_d15 0 2900 CFG_VIN2A_D15_OUT pr1_pru1_gpo12 B2 vin2a_d16 0 2700 CFG_VIN2A_D16_OUT pr1_pru1_gpo13 D6 vin2a_d17 0 3000 CFG_VIN2A_D17_OUT pr1_pru1_gpo14 C5 vin2a_d18 0 2200 CFG_VIN2A_D18_OUT pr1_pru1_gpo15 A3 vin2a_d19 0 2300 CFG_VIN2A_D19_OUT pr1_pru1_gpo16 B3 vin2a_d20 0 1800 CFG_VIN2A_D20_OUT pr1_pru1_gpo17 B4 vin2a_d21 0 1900 CFG_VIN2A_D21_OUT pr1_pru1_gpo18 B5 vin2a_d22 0 1400 CFG_VIN2A_D22_OUT pr1_pru1_gpo19 A4 vin2a_d23 0 1900 CFG_VIN2A_D23_OUT pr1_pru1_gpo20 E2 vin2a_d3 0 3900 CFG_VIN2A_D3_OUT pr1_pru1_gpo0 D2 vin2a_d4 0 5100 CFG_VIN2A_D4_OUT pr1_pru1_gpo1 F4 vin2a_d5 0 0 CFG_VIN2A_D5_OUT pr1_pru1_gpo2 C1 vin2a_d6 0 2700 CFG_VIN2A_D6_OUT pr1_pru1_gpo3 E4 vin2a_d7 0 2600 CFG_VIN2A_D7_OUT pr1_pru1_gpo4 F5 vin2a_d8 0 2500 CFG_VIN2A_D8_OUT pr1_pru1_gpo5 E6 vin2a_d9 0 1900 CFG_VIN2A_D9_OUT pr1_pru1_gpo6 Manual IO Timings Modes must be used to ensure some IO timings for PRU-ICSS1 PRU0 Direct Input mode. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-158 Manual Functions Mapping for PRU-ICSS1 PRU0 Direct Input mode for a definition of the Manual modes. Table 7-158 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-158. Manual Functions Mapping for PRU-ICSS1 PRU0 Direct Input mode BALL BALL NAME PR1_PRU0_DIR_IN_MANUAL CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 12 AG3 vin1a_d10 0 0 CFG_VIN1A_D10_IN pr1_pru0_gpi7 AG5 vin1a_d11 0 300 CFG_VIN1A_D11_IN pr1_pru0_gpi8 AF2 vin1a_d12 0 800 CFG_VIN1A_D12_IN pr1_pru0_gpi9 AF6 vin1a_d13 0 0 CFG_VIN1A_D13_IN pr1_pru0_gpi10 AF3 vin1a_d14 0 600 CFG_VIN1A_D14_IN pr1_pru0_gpi11 AF4 vin1a_d15 0 1100 CFG_VIN1A_D15_IN pr1_pru0_gpi12 AF1 vin1a_d16 0 800 CFG_VIN1A_D16_IN pr1_pru0_gpi13 AE3 vin1a_d17 0 1000 CFG_VIN1A_D17_IN pr1_pru0_gpi14 AE5 vin1a_d18 0 1100 CFG_VIN1A_D18_IN pr1_pru0_gpi15 AE1 vin1a_d19 0 2800 CFG_VIN1A_D19_IN pr1_pru0_gpi16 AE2 vin1a_d20 0 900 CFG_VIN1A_D20_IN pr1_pru0_gpi17 AE6 vin1a_d21 0 800 CFG_VIN1A_D21_IN pr1_pru0_gpi18 AD2 vin1a_d22 0 1400 CFG_VIN1A_D22_IN pr1_pru0_gpi19 AD3 vin1a_d23 0 1001 CFG_VIN1A_D23_IN pr1_pru0_gpi20 |
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