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AM5728 Datasheet(PDF) 365 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 365 Page - Texas Instruments |
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365 / 415 page  365 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-163. Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Direct Input mode (continued) BALL BALL NAME PR2_PRU0_DIR_IN_MANUAL2 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 12 C17 mcasp3_axr1 0 1200 CFG_MCASP3_AXR1_IN pr2_pru0_gpi15 F15 mcasp3_fsx 0 1400 CFG_MCASP3_FSX_IN pr2_pru0_gpi13 AD4 mmc3_clk 1000 4500 CFG_MMC3_CLK_IN pr2_pru0_gpi2 AC4 mmc3_cmd 1000 4000 CFG_MMC3_CMD_IN pr2_pru0_gpi3 AC7 mmc3_dat0 1000 4200 CFG_MMC3_DAT0_IN pr2_pru0_gpi4 AC6 mmc3_dat1 1000 3800 CFG_MMC3_DAT1_IN pr2_pru0_gpi5 AC9 mmc3_dat2 1000 3800 CFG_MMC3_DAT2_IN pr2_pru0_gpi6 AC3 mmc3_dat3 1000 4400 CFG_MMC3_DAT3_IN pr2_pru0_gpi7 AC8 mmc3_dat4 1000 4100 CFG_MMC3_DAT4_IN pr2_pru0_gpi8 AD6 mmc3_dat5 1000 4000 CFG_MMC3_DAT5_IN pr2_pru0_gpi9 AB8 mmc3_dat6 1000 3900 CFG_MMC3_DAT6_IN pr2_pru0_gpi10 AB5 mmc3_dat7 1000 3500 CFG_MMC3_DAT7_IN pr2_pru0_gpi11 B18 mcasp3_aclkx 0 0 CFG_MCASP3_ACLKX_IN pr2_pru0_gpi12 Manual IO Timings Modes must be used to ensure some IO timings for PRU-ICSS2 PRU0 IOSET1 Direct Output mode. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-164 Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET1 Direct Output mode for a definition of the Manual modes. Table 7-164 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-164. Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET1 Direct Output mode BALL BALL NAME PR2_PRU0_DIR_OUT_MANUAL1 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 13 D7 vout1_d10 0 0 CFG_VOUT1_D10_OUT pr2_pru0_gpo7 D8 vout1_d11 0 200 CFG_VOUT1_D11_OUT pr2_pru0_gpo8 A5 vout1_d12 0 2300 CFG_VOUT1_D12_OUT pr2_pru0_gpo9 C6 vout1_d13 0 450 CFG_VOUT1_D13_OUT pr2_pru0_gpo10 C8 vout1_d14 0 600 CFG_VOUT1_D14_OUT pr2_pru0_gpo11 C7 vout1_d15 0 500 CFG_VOUT1_D15_OUT pr2_pru0_gpo12 B7 vout1_d16 0 100 CFG_VOUT1_D16_OUT pr2_pru0_gpo13 B8 vout1_d17 0 300 CFG_VOUT1_D17_OUT pr2_pru0_gpo14 A7 vout1_d18 0 700 CFG_VOUT1_D18_OUT pr2_pru0_gpo15 A8 vout1_d19 0 700 CFG_VOUT1_D19_OUT pr2_pru0_gpo16 C9 vout1_d20 0 900 CFG_VOUT1_D20_OUT pr2_pru0_gpo17 A9 vout1_d21 0 900 CFG_VOUT1_D21_OUT pr2_pru0_gpo18 B9 vout1_d22 0 300 CFG_VOUT1_D22_OUT pr2_pru0_gpo19 A10 vout1_d23 0 300 CFG_VOUT1_D23_OUT pr2_pru0_gpo20 G11 vout1_d3 0 1300 CFG_VOUT1_D3_OUT pr2_pru0_gpo0 E9 vout1_d4 0 2500 CFG_VOUT1_D4_OUT pr2_pru0_gpo1 F9 vout1_d5 0 950 CFG_VOUT1_D5_OUT pr2_pru0_gpo2 F8 vout1_d6 0 800 CFG_VOUT1_D6_OUT pr2_pru0_gpo3 E7 vout1_d7 0 600 CFG_VOUT1_D7_OUT pr2_pru0_gpo4 E8 vout1_d8 0 500 CFG_VOUT1_D8_OUT pr2_pru0_gpo5 D9 vout1_d9 0 500 CFG_VOUT1_D9_OUT pr2_pru0_gpo6 |
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