 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AM5728 Datasheet(PDF) 367 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
AM5728 Datasheet(HTML) 367 Page - Texas Instruments |
|
|
367 / 415 page  367 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-166. Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET1 Direct Input mode (continued) BALL BALL NAME PR2_PRU1_DIR_IN_MANUAL1 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 12 V3 rgmii0_rxd2 0 2900 CFG_RGMII0_RXD2_IN pr2_pru1_gpi14 V4 rgmii0_rxd3 0 3363 CFG_RGMII0_RXD3_IN pr2_pru1_gpi13 W9 rgmii0_txc 0 2488 CFG_RGMII0_TXC_IN pr2_pru1_gpi5 V9 rgmii0_txctl 0 2263 CFG_RGMII0_TXCTL_IN pr2_pru1_gpi6 U6 rgmii0_txd0 0 2292 CFG_RGMII0_TXD0_IN pr2_pru1_gpi10 V6 rgmii0_txd1 0 2900 CFG_RGMII0_TXD1_IN pr2_pru1_gpi9 U7 rgmii0_txd2 0 2800 CFG_RGMII0_TXD2_IN pr2_pru1_gpi8 V7 rgmii0_txd3 0 2400 CFG_RGMII0_TXD3_IN pr2_pru1_gpi7 V2 uart3_rxd 0 1900 CFG_UART3_RXD_IN pr2_pru1_gpi3 Y1 uart3_txd 0 1900 CFG_UART3_TXD_IN pr2_pru1_gpi4 E11 vout1_vsync 0 0 CFG_VOUT1_VSYNC_IN pr2_pru1_gpi17 F11 vout1_d0 0 1020 CFG_VOUT1_D0_IN pr2_pru1_gpi18 G10 vout1_d1 0 976 CFG_VOUT1_D1_IN pr2_pru1_gpi19 F10 vout1_d2 0 946 CFG_VOUT1_D2_IN pr2_pru1_gpi20 Manual IO Timings Modes must be used to ensure some IO timings for PRU-ICSS2 PRU1 IOSET2 Direct Input mode. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-167 Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET2 Direct Input mode for a definition of the Manual modes. Table 7-167 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-167. Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET2 Direct Input mode BALL BALL NAME PR2_PRU1_DIR_IN_MANUAL2 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 12 C14 mcasp1_aclkx 0 700 CFG_MCASP1_ACLKX_IN pr2_pru1_gpi7 G12 mcasp1_axr0 0 2100 CFG_MCASP1_AXR0_IN pr2_pru1_gpi8 F12 mcasp1_axr1 0 1250 CFG_MCASP1_AXR1_IN pr2_pru1_gpi9 B13 mcasp1_axr10 0 1800 CFG_MCASP1_AXR10_IN pr2_pru1_gpi12 A12 mcasp1_axr11 0 1700 CFG_MCASP1_AXR11_IN pr2_pru1_gpi13 E14 mcasp1_axr12 0 1000 CFG_MCASP1_AXR12_IN pr2_pru1_gpi14 A13 mcasp1_axr13 0 1300 CFG_MCASP1_AXR13_IN pr2_pru1_gpi15 G14 mcasp1_axr14 0 1200 CFG_MCASP1_AXR14_IN pr2_pru1_gpi16 E11 vout1_vsync 0 0 CFG_VOUT1_VSYNC_IN pr2_pru1_gpi17 F11 vout1_d0 0 0 CFG_VOUT1_D0_IN pr2_pru1_gpi18 G10 vout1_d1 0 0 CFG_VOUT1_D1_IN pr2_pru1_gpi19 F10 vout1_d2 0 0 CFG_VOUT1_D2_IN pr2_pru1_gpi20 B12 mcasp1_axr8 0 1450 CFG_MCASP1_AXR8_IN pr2_pru1_gpi10 A11 mcasp1_axr9 0 1600 CFG_MCASP1_AXR9_IN pr2_pru1_gpi11 D17 mcasp4_axr1 0 1200 CFG_MCASP4_AXR1_IN pr2_pru1_gpi0 AA3 mcasp5_aclkx 800 4100 CFG_MCASP5_ACLKX_IN pr2_pru1_gpi1 AB3 mcasp5_axr0 900 4100 CFG_MCASP5_AXR0_IN pr2_pru1_gpi3 AA4 mcasp5_axr1 1000 4100 CFG_MCASP5_AXR1_IN pr2_pru1_gpi4 AB9 mcasp5_fsx 800 3800 CFG_MCASP5_FSX_IN pr2_pru1_gpi2 D18 xref_clk0 0 0 CFG_XREF_CLK0_IN pr2_pru1_gpi5 E17 xref_clk1 0 400 CFG_XREF_CLK1_IN pr2_pru1_gpi6 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
