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AM5728 Datasheet(PDF) 370 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 370 Page - Texas Instruments |
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370 / 415 page  370 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Manual IO Timings Modes must be used to ensure some IO timings for PRU-ICSS2 PRU0 IOSET2 Parallel Capture mode. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-171 Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Parallel Capture mode for a definition of the Manual modes. Table 7-171 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-171. Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Parallel Capture mode BALL BALL NAME PR2_PRU0_PAR_CAP_MANUAL2 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 12 AC5 gpio6_10 3800 1785 CFG_GPIO6_10_IN pr2_pru0_gpi0 AB4 gpio6_11 3747 2246 CFG_GPIO6_11_IN pr2_pru0_gpi1 C15 mcasp2_axr2 0 0 CFG_MCASP2_AXR2_IN pr2_pru0_gpi16 B18 mcasp3_aclkx 271 0 CFG_MCASP3_ACLKX_IN pr2_pru0_gpi12 B19 mcasp3_axr0 1215 0 CFG_MCASP3_AXR0_IN pr2_pru0_gpi14 C17 mcasp3_axr1 1678 0 CFG_MCASP3_AXR1_IN pr2_pru0_gpi15 F15 mcasp3_fsx 1862 0 CFG_MCASP3_FSX_IN pr2_pru0_gpi13 AD4 mmc3_clk 3888 1913 CFG_MMC3_CLK_IN pr2_pru0_gpi2 AC4 mmc3_cmd 3804 1690 CFG_MMC3_CMD_IN pr2_pru0_gpi3 AC7 mmc3_dat0 3771 1681 CFG_MMC3_DAT0_IN pr2_pru0_gpi4 AC6 mmc3_dat1 3689 1591 CFG_MMC3_DAT1_IN pr2_pru0_gpi5 AC9 mmc3_dat2 3807 1441 CFG_MMC3_DAT2_IN pr2_pru0_gpi6 AC3 mmc3_dat3 3680 2415 CFG_MMC3_DAT3_IN pr2_pru0_gpi7 AC8 mmc3_dat4 3846 1455 CFG_MMC3_DAT4_IN pr2_pru0_gpi8 AD6 mmc3_dat5 3747 1673 CFG_MMC3_DAT5_IN pr2_pru0_gpi9 AB8 mmc3_dat6 3777 1557 CFG_MMC3_DAT6_IN pr2_pru0_gpi10 AB5 mmc3_dat7 3775 1320 CFG_MMC3_DAT7_IN pr2_pru0_gpi11 Manual IO Timings Modes must be used to ensure some IO timings for PRU-ICSS2 PRU1 IOSET1 Parallel Capture mode. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-172 Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET1 Parallel Capture mode for a definition of the Manual modes. Table 7-171 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-172. Manual Functions Mapping for PRU-ICSS2 PRU1 IOSET1 Parallel Capture mode BALL BALL NAME PR2_PRU1_PAR_CAP_MANUAL1 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 12 U3 RMII_MHZ_50_CLK 1234 0 CFG_RMII_MHZ_50_CLK_IN pr2_pru1_gpi2 U4 mdio_d 1693 0 CFG_MDIO_D_IN pr2_pru1_gpi1 V1 mdio_mclk 1045 0 CFG_MDIO_MCLK_IN pr2_pru1_gpi0 U5 rgmii0_rxc 1028 0 CFG_RGMII0_RXC_IN pr2_pru1_gpi11 V5 rgmii0_rxctl 1896 0 CFG_RGMII0_RXCTL_IN pr2_pru1_gpi12 W2 rgmii0_rxd0 0 0 CFG_RGMII0_RXD0_IN pr2_pru1_gpi16 Y2 rgmii0_rxd1 1659 0 CFG_RGMII0_RXD1_IN pr2_pru1_gpi15 V3 rgmii0_rxd2 1448 0 CFG_RGMII0_RXD2_IN pr2_pru1_gpi14 V4 rgmii0_rxd3 1762 0 CFG_RGMII0_RXD3_IN pr2_pru1_gpi13 W9 rgmii0_txc 1384 0 CFG_RGMII0_TXC_IN pr2_pru1_gpi5 V9 rgmii0_txctl 953 0 CFG_RGMII0_TXCTL_IN pr2_pru1_gpi6 U6 rgmii0_txd0 1170 0 CFG_RGMII0_TXD0_IN pr2_pru1_gpi10 |
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