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AM5728 Datasheet(PDF) 375 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 375 Page - Texas Instruments |
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375 / 415 page  375 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Applications, Implementation, and Layout Copyright © 2015–2019, Texas Instruments Incorporated 8 Applications, Implementation, and Layout NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test design implementation to confirm system functionality. 8.1 Power Supply Mapping TPS659037 is the Power Management IC (PMIC) that should be used for the Device designs. TI requires use of this PMIC for the following reasons: • TI has validated its use with the Device • Board level margins including transient response and output accuracy are analyzed and optimized for the entire system • Support for power sequencing requirements (refer to Section 5.9 Power Supply Sequences) • Support for Adaptive Voltage Scaling (AVS) Class 0 requirements, including TI provided software Whenever we allow for combining of rails mapped on any of the SMPSes, the PDN guidelines that are the most stringent of the rails combined should be implemented for the particular supply rail. It is possible that some voltage domains on the device are unused in some systems. In such cases, to ensure device reliability, it is still required that the supply pins for the specific voltage domains are connected to some core power supply output. These unused supplies though can be combined with any of the core supplies that are used (active) in the system. e.g. if IVA and GPU domains are not used, they can be combined with the CORE domain, thereby having a single power supply driving the combined CORE, IVA and GPU domains. For the combined rail, the following relaxations do apply: • The AVS voltage of active rail in the combined rail needs to be used to set the power supply • The decoupling capacitance should be set according to the active rail in the combined rail Table 8-1 illustrates the approved and validated power supply connections to the Device for the SMPS outputs of the TPS659037 PMIC. Table 8-1. TPS659037 Power Supply Connections(1) TPS659037 Power Supply Valid Combination 1 Valid Combination 2 SMPS1/2(2) vdd_mpu vdd_mpu SMPS3 vdds_ddr1, vdds_ddr2 vdds_ddr1, vdds_ddr2 SMPS4/5 vdd_dspeve, vdd_gpu, vdd_iva vdd_dspeve SMPS6 vdd vdd_gpu SMPS7 SW configuration after boot vdd SMPS8 vdds18v vdd_iva SMPS9 SW configuration after boot 3.3V vddshvx LDO1 vddshv8 vddshv8 LDO2 vddshv5 vdds18v LDO3 vdda_usb1, vdda_usb2, vdda_usb3, vdda_sata vdda_usb1, vdda_usb2, vdda_usb3, vdda_sata LDO4 vdda_hdmi, vdda_pcie, vdda_pcie0, vdda_pcie1 vdda_hdmi, vdda_pcie, vdda_pcie0, vdda_pcie1 LDO9 vdd_rtc vdd_rtc LDOLN 1.8V PLLs 1.8V PLLs LDOUSB vdda_usb3v3 vdda_usb3v3 |
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