TMS320DM643 datasheet(87/160 Pages) TI

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Setup = 2

Strobe = 3

Not Ready

Hold = 2

Address

AARDY

AECLKOUTx

ACEx

AEA[22:3]

AED[63:0]

AAOE/ASDRAS/ASOE(A)

AARE/ASDCAS/ASADS/ASRE(A)

ABE[7:0]

AAWE/ASDWE/ASWE(A)

Read Data

A. AAOE/ASDRAS/ASOE, AARE/ASDCAS/ASADS/ASRE, and AAWE/ASDWE/ASWE operate as AAOE (identified under select signals),

AARE, and AAWE, respectively, during asynchronous memory accesses.

TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005

Table 5-22. Switching Characteristics Over Recommended Operating Conditions for Asynchronous

Memory Cycles for EMIFA Module

(1) (2) (3) (see Figure 5-17 and Figure 5-18)

–500

–600

NO.

PARAMETER

UNIT

MIN

MAX

tosu(SELV-AREL)

Output setup time, select signals valid to AARE low

RS * E – 1.5

toh(AREH-SELIV)

Output hold time, AARE high to select signals invalid

RH * E – 1.9

td(EKO1H-AREV)

Delay time, AECLKOUTx high to AARE valid

tosu(SELV-AWEL)

Output setup time, select signals valid to AAWE low

WS * E – 1.7

toh(AWEH-SELIV)

Output hold time, AAWE high to select signals invalid

WH * E – 2.5

td(EKO1H-AWEV)

Delay time, AECLKOUTx high to AAWE valid

1.3

7.1

(1)

RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold. These parameters

are programmed via the EMIF CE space control registers.

(2)

E = AECLKOUT1 period in ns for EMIFA

(3)

Select signals for EMIFA include: ACEx, ABE[7:0], AEA[22:3], AAOE; and for EMIFA writes, include AED[63:0].

Figure 5-17. Asynchronous Memory Read Timing for EMIFA

DM643 Peripheral Information and Electrical Specifications

TMS320DM643 Datasheet(PDF) 87 Page - Texas Instruments

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