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HD64F2145 Datasheet(PDF) 358 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 358 Page - Renesas Technology Corp |
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358 / 829 page ![]() Rev. 2.0, 08/02, page 318 of 788 Table 13.9 Examples of OCRAR, OCRAF, TCORA, TCORB, TCR, and TCSR Settings Register Bit Abbreviation Contents Description 7 CMIEB 0 6 CMIEA 0 5OVIE 0 Interrupts due to compare-match and overflow are disabled 4 and 3 CCLR1 and CCLR0 01 TCNT is cleared by compare-match A TCR in TMR_Y 2 to 0 CKS2 to CKS0 001 TCNT is incremented on internal clock: ø/4 TCSR in TMR_Y 3 to 0 OS3 to OS0 0110 0 output on compare-match B 1 output on compare-match A TCORA in TMR_Y H'3F (example) IHG signal period = ø × 256 TCORB in TMR_Y H'03 (example) IHG signal 1 interval = ø × 16 TCR in FRT 1 and 0 CKS1 and CKS0 01 FRC is incremented on internal clock: ø/8 OCRAR in FRT H'7FEF (example) IVG signal 0 interval = ø × 262016 OCRAF in FRT H'000F (example) IVG signal 1 interval = ø × 128 IVG signal period = ø × 262144 (1024 times IHG signal) TOCR in FRT 6 OCRAMS 1 OCRA is set to the operating mode in which OCRAR and OCRAF are used |
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