HD64F2145 datasheet(365/829 Pages) RENESAS

365 / 829 page

Rev. 2.0, 08/02, page 325 of 788

Section 14 Watchdog Timer (WDT)

This LSI incorporates two watchdog timer channels (WDT_0 and WDT_1). The watchdog timer

can generate an internal reset signal or an internal NMI interrupt signal if a system crash prevents

the CPU from writing to the timer counter, thus allowing it to overflow. Simultaneously, it can

output an overflow signal (

5(62) externally.

When this watchdog function is not needed, the WDT can be used as an interval timer. In interval

timer operation, an interval timer interrupt is generated each time the counter overflows. A block

diagram of the WDT_0 and WDT_1 is shown in figure 14.1.

14.1

Features

• Selectable from eight (WDT_0) or 16 (WDT_1) counter input clocks.

• Switchable between watchdog timer mode and interval timer mode

Watchdog Timer Mode:

• If the counter overflows, an internal reset or an internal NMI interrupt is generated.

• When the LSI is selected to be internally reset at counter overflow, a low level signal is output

from the

5(62 pin if the counter overflows.

Internal Timer Mode:

• If the counter overflows, an internal timer interrupt (WOVI) is generated.

WDT0102A_010020020700

HD64F2145 Datasheet(PDF) 365 Page - Renesas Technology Corp