HD64F2145 datasheet(427/829 Pages) RENESAS

427 / 829 page

Rev. 2.0, 08/02, page 387 of 788

15.9.6

Restrictions on Using DTC

When an external clock source is used as a synchronization clock, update TDR by the DTC or

RFU and wait for at least five ø clock cycles before allowing the transmit clock to be input. If the

transmit clock is input within four clock cycles after TDR modification, the SCI may malfunction

(figure 15.23).

When using the DTC to read RDR, be sure to set the receive end interrupt source (RXI) as a DTC

activation source.

LSB

Serial data

SCK

Note:* When external clock is supplied, t must be more than four clock cycles.

TDRE

Figure 15.23 Example of Transmission using DTC in Clocked Synchronous Mode

15.9.7

SCI Operations during Mode Transitions

Transmission: Before making a transition to module stop, software standby, or sub-sleep mode,

stop all transmit operations (TE = TIE = TEIE = 0). TSR, TDR, and SSR are reset. The states of

the output pins during each mode depend on the port settings, and the pins output a high-level

signal after mode cancellation. If a transition is made during data transmission, the data being

transmitted will be undefined.

To transmit data in the same transmission mode after mode cancellation, set TE to 1, read SSR,

write to TDR, clear TDRE in this order, and then start transmission. To transmit data in a

different transmission mode, initialize the SCI first.

Figure 15.24 shows a sample flowchart for mode transition during transmission. Figures 15.25

and 15.26 show the pin states during transmission.

Before making a transition from the transmission mode using DTC transfer to module stop,

software standby, or sub-sleep mode, stop all transmit operations (TE = TIE = TEIE = 0). Setting

TE and TIE to 1 after mode cancellation generates a TXI interrupt request to start transmission

using the DTC.

HD64F2145 Datasheet(PDF) 427 Page - Renesas Technology Corp