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HD64F2145 Datasheet(PDF) 429 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 429 Page - Renesas Technology Corp |
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429 / 829 page ![]() Rev. 2.0, 08/02, page 389 of 788 TE bit SCK output pin TxD output pin Port input/output Port input/output Port input/output Start Stop High output High output Transmission start Transmission end Transition to software standby mode Software standby mode cancelled SCI TxD output Port Port SCI TxD output Figure 15.25 Pin States during Transmission in Asynchronous Mode (Internal Clock) TE bit SCK output pin TxD output pin Port input/output Port input/output Port input/output High output* Marking output Transmission start Transmission end Transition to software standby mode Software standby mode cancelled SCI TxD output Port Port SCI TxD output Last TxD bit retained Note:* Initialized in software standby mode Figure 15.26 Pin States during Transmission in Clocked Synchronous Mode (Internal Clock) |
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