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HMA41GR7AFR4N Datasheet(PDF) 13 Page - Hynix Semiconductor

Part # HMA41GR7AFR4N
Description  DDR4 SDRAM Registered DIMM Based on 4Gb A-die
PDF  79 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HMA41GR7AFR4N Datasheet(HTML) 13 Page - Hynix Semiconductor

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Rev. 1.6 / Mar.2016
13
8GB, 1Gx72 Module(2Rank of x8) - page1
CKE1A
ODT1A
CS1A_n
CKE0A
ODT0A
CS0A_n
CKE1B
ODT1B
CS1B_n
CKE0B
ODT0B
CS0B_n
DQS8_t
DQS8_c
CB [7:0]
DQS3_t
DQS3_c
DQ [31:24]
DQS2_t
DQS2_c
DQ [23:16]
DQS‘_t
DQS‘_c
DQ [15:8]
DQS_t
DQS_c
DQ [7:0]
D4
ZQ
DQS_t
DQS_c
DQ [7:0]
D3
ZQ
DQS_t
DQS_c
DQ [7:0]
D2
ZQ
DQS_t
DQS_c
DQ [7:0]
D1
ZQ
D0–D17
VPP
VDD
VDDSPD
D0–D17
VREFCA
RCD, Serial PD
VTT
VSS
D0–D17
D0–D17, RCD, Serial PD
Note:
1. Unless otherwize noted, resistor values are 15 Ω±5%.
2. See the Net Structure diagrams for all resistor associated with the command, address and control bus.
3. ZQ resistors are 240 Ω±1%.For all other resistor values refer to the appropriate wiring diagram.
4. The TEN pin on the SDRAMs are tied to Vss.
5. VDD and VDDSPD also connect to the RCD
VSS
VSS
VSS
VSS
DQS_t
DQS_c
DQ [7:0]
D13
ZQ
DQS_t
DQS_c
DQ [7:0]
D12
ZQ
DQS_t
DQS_c
DQ [7:0]
D11
ZQ
DQS_t
DQS_c
DQ [7:0]
D10
ZQ
VSS
VSS
VSS
VSS
DQS4_t
DQS4_c
DQ [39:32]
DQS5_t
DQS5_c
DQ [47:40]
DQS6_t
DQS6_c
DQ [55:48]
DQS7_t
DQS7_c
DQ [59:56]
DQS_t
DQS_c
DQ [7:0]
D5
ZQ
DQS_t
DQS_c
DQ [7:0]
D6
ZQ
DQS_t
DQS_c
DQ [7:0]
D7
ZQ
DQS_t
DQS_c
DQ [7:0]
D8
ZQ
VSS
VSS
VSS
VSS
DQS_t
DQS_c
DQ [7:0]
D14
ZQ
DQS_t
DQS_c
DQ [7:0]
D15
ZQ
DQS_t
DQS_c
DQ [7:0]
D16
ZQ
DQS_t
DQS_c
DQ [7:0]
D17
ZQ
VSS
VSS
VSS
VSS
DQS0_t
DQS0_c
DQ [7:0]
DQS_t
DQS_c
DQ [7:0]
D0
ZQ
VSS
DQS_t
DQS_c
DQ [7:0]
D9
ZQ
VSS
DBI8_n/DM8_n
DBI_n/DM_n
DBI_n/DM_n
DBI4_n/DM4_n
DBI_n/DM_n
DBI_n/DM_n
DBI3_n/DM3_n
DBI_n/DM_n
DBI_n/DM_n
DBI5_n/DM5_n
DBI_n/DM_n
DBI_n/DM_n
DBI2_n/DM2_n
DBI_n/DM_n
DBI_n/DM_n
DBI6_n/DM6_n
DBI_n/DM_n
DBI_n/DM_n
DBI1_n/DM1_n
DBI_n/DM_n
DBI_n/DM_n
DBI7_n/DM7_n
DBI_n/DM_n
DBI_n/DM_n
DBI0_n/DM0_n
DBI_n/DM_n
DBI_n/DM_n
SA0
Serial PD with Thermal sensor
SA1
SA0
SA1
SCL
EVENT_n
SA2
SA2
EVENT_n
SCL
SDA
SDA
SA0 SA1
SA0
SA1
BFUNC
SA2
SA2
VSS
SCL
SDA
1K Ω
±5%
RCD



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