SAM5808B datasheet(21/83 Pages) ETC1

21 / 83 page

SAM5808B

SAM5808B.pdf

– Rev 14/05/2018

4.3.4. Ethernet as primary function

Pin name

Pin#

Type

Mem

Cfg

Description

REF_CLK

Out DR12

1-4

25MHz RMII reference clock to the Ethernet PHY.

SPICS1/

Out DR12

1-4

Chip select 1 for Multi-purpose Quad SPI interface.

P8.0

I/O (PU)

DR12

1-4

General purpose I/O pin.

ETH_RES/

117

Out DR4

1-4

Reset output to the Ethernet PHY

XWSBD1

117

1-4

External

word

select

clock

for

digital

audio

inputs

DAAD[7:0].

P8.1

117

I/O DR4

1-4

General purpose I/O pin.

RX_ER

116

1-4

RMII Receive Error from the Ethernet PHY.

XCLBD1

116

1-4

External clock bit for digital audio inputs DAAD[7:0].

P8.2_IntB

116

I/O DR4

1-4

General purpose I/O pin.

External Interrupt source IntB.

RXD0

164

1-4

RMII Receive Data 0 from the Ethernet PHY.

DAAD6

164

1-4

Stereo audio digital input 6, I2S or MSB format. Can

operate on CLBD master rate or XCLBD external rate.

P8.3

164

I/O DR4

1-4

General purpose I/O pin.

RXD1

165

1-4

RMII Receive Data 1 from the Ethernet PHY.

DAAD7

165

1-4

Stereo audio digital input 7, I2S or MSB format. Can

operate on CLBD master rate or XCLBD external rate.

P8.4

165

I/O DR4

1-4

General purpose I/O pin.

CRS_DV

167

1-4

RMII Carrier Sense/Receive Data Valid from the Ethernet

PHY

DABD6

167

Out DR4

1-4

Stereo audio digital output 6, I2S or MSB format.

P8.5

167

I/O DR4

1-4

General purpose I/O pin.

TXD0

161

Out DR4

1-4

RMII Transmit Data 0 to the Ethernet PHY.

DABD7

161

Out DR4

1-4

Stereo audio digital output 7, I2S or MSB format.

P8.6

161

I/O DR4

1-4

General purpose I/O pin.

TXD1

163

Out DR4

1-4

RMII Transmit Data 1 to the Ethernet PHY.

SPICS2/

163

Out DR4

1-4

Chip select 2 for Multi-purpose Quad SPI interface.

P8.7

163

I/O (PU)

DR4

1-4

General purpose I/O pin.

TX_EN

166

Out DR4

1-4

RMII Transmit Enable to the Ethernet PHY.

SPICS3/

166

Out DR4

1-4

Chip select 3 for Multi-purpose Quad SPI interface.

P8.8

166

I/O (PU)

DR4

1-4

General purpose I/O pin.

MDC

Out MEM

1-4

Management Interface (MII) Clock to the Ethernet PHY.

XWSBD0

In MEM

1-4

- External word select clock 0 for digital audio inputs

DAAD[7:0].

- Word Clock input for audio sync. on external clock device.

P8.9

I/O MEM

1-4

General purpose I/O pin.

MDIO

I/O MEM

1-4

Management Interface (MII) Data I/O to the Ethernet PHY.

XCLBD0

In MEM

1-4

External clock bit for digital audio inputs DAAD[7:0].

P8.10

I/O MEM

1-4

General purpose I/O pin.

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