DSC6311ME2AA-T datasheet(3/28 Pages) MICROCHIP

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DS20005808A-page 3

DSC63XX

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

Supply Voltage .......................................................................................................................................... –0.3V to +4.0V

Input Voltage (VIN) ..............................................................................................................................–0.3V to VDD+0.3V

ESD Protection ............................................................................................................ 4 kV HBM, 400V MM, 2 kV CDM

DSC63XX ELECTRICAL CHARACTERISTICS

Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to 85°C.

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Supply Voltage, Note 1

VDD

1.71

—

3.63

—

Power Supply Ramp

tPU

0.1

—

100

Note 8

Active Supply Current

IDD

—3.0

—

FOUT = 27 MHz, VDD = 1.8V,

No Load

Standby Supply Current

Note 2

ISTBY

—12

—

µA

VDD = 1.8/2.5V

—80

—

VDD = 3.3V

Frequency Stability Note 3

∆f—

—

±25

±50

ppm

All temp ranges

Aging

∆f

——

±5

ppm

1st year @25°C

—

±1

Per year after first year

Startup Time

tSU

——

1.3

From 90% VDD to valid clock

output, T = 25°C

Input Logic Levels Note 4

VIH

0.7 x VDD

—

Input Logic High

VIL

—

0.3 x VDD

Input Logic Low

Output Disable Time

Note 5

tDA

—

200+Period

—

Output Enable Time

Note 6

tEN

——

µs

—

OE/STDBY/SSEN Pull-up

Resistor Note 7

——

300

—

kΩ

If configured

Output Logic Levels

VOH

0.8 x VDD

——

Output Logic High, I = 3 mA,

Std. Drive

Output Logic High, I = 6 mA,

High Drive

VOL

—

0.2 x VDD

Output Logic Low, I = –3 mA,

Std. Drive

Output Logic Low, I = –6 mA,

High Drive

Note 1: Pin 4 VDD should be filtered with 0.1 µf capacitor.

2: Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at

>3.3V VDD.

3: Includes frequency variations due to initial tolerance, temperature, and power supply voltage.

4: Input waveform must be monotonic with rise/fall time < 10 ms

5: Output Disable time takes up to one period of the output waveform + 200 ns.

6: For parts configured with OE, not Standby.

7: Output is enabled if pad is floated or not connected.

8: Time to reach 90% of target VDD. Power ramp rise must be monotonic.

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