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SAF-C161PI Datasheet(PDF) 118 Page - Infineon Technologies AG |
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SAF-C161PI Datasheet(HTML) 118 Page - Infineon Technologies AG |
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118 / 400 page  &3, &ORFN*HQHUDWLRQ User’s Manual 6-2 1999-08 6.1 Oscillator The main oscillator of the C161PI is a power optimized Pierce oscillator providing an inverter and a feedback element. Pins XTAL1 and XTAL2 connect the inverter to the external crystal. The standard external oscillator circuitry (see figure below) comprises the crystal, two low end capacitors and series resistor (Rx2) to limit the current through the crystal. The additional LC combination is only required for 3rd overtone crystals to suppress oscillation in the fundamental mode. A test resistor (R Q) may be temporarily inserted to measure the oscillation allowance of the oscillator circuitry. Figure 6-2 External Oscillator Circuitry The on-chip oscillator is optimized for an input frequency range of 1 to 16 MHz. An external clock signal (e.g. from an external oscillator or from a master device) may be fed to the input XTAL1. The Pierce oscillator then is not required to support the oscillation itself but is rather driven by the input signal. In this case the input frequency range may be 0 to 50 MHz (please note that the maximum applicable input frequency is limited by the device’s maximum CPU frequency). For input frequencies above 25...30 MHz the oscillator’s output should be terminated as shown in the figure below, at lower frequencies it may be left open. This termination improves the operation of the oscillator by filtering out frequencies above the intended oscillator frequency. XTAL1 XTAL2 Rx2 R Q |
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