CS4270 datasheet(21/48 Pages) CIRRUS

21 / 48 page

DS686A1

CS4270

4. TYPICAL CONNECTION DIAGRAM

Figure 10. CS4270 Typical Connection Diagram

)

(I2S/

AD0

SDA / CDIN (M1)

SCL / CCLK (M0)

AINA

AINB

RST

Power Down

and Mode

Settings

(Control Port)

AOUTA

MUTEA

AOUTB

MUTEB

Analog Conditioning

Mute

LRCK

SCLK

MCLK

Timing Logic

Clock

SDIN

)

(M/

SDOUT

Audio Data

Processor

DGND

FILT+

AGND

+3.3 V to 5 V

CS4270

GND or VD

47 k

Ω

5.1

Ω

Analog Input

Network

47 µF

0.1 µF

1 µF

0.1 µF

1 µF

0.1 µF

1 µF

0.1 µF

If using separate supplies for

VA and VD, 5.1

Ω resistor not

needed. See "Grounding and

Power Supply Decoupling."

VLC

+1.8 V to 5 V

Use pull-up resistors in Software

Mode. In Hardware Mode, use

pull-up or pull-down. See "Mode

Selection & De-Emphasis."

2 k

Ω

2 k

Ω

(see Figures 12 & 13)

(see Figures 14 & 15)

Use a 47 k

Ω pull-down to select

Master Mode or 47 k

Ω pull-up to

VD to select Slave Mode. See

"Master/Slave Mode Selection."

AD1 (MDIV2)

AD2 (MDIV1)

CS4270 Datasheet(PDF) 21 Page - Cirrus Logic

CS4270 Datasheet(HTML) 21 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL