A1373LKB datasheet(18/23 Pages) ALLEGRO

18 / 23 page

A1373-DS, Rev. 3

Worcester, Massachusetts 01615-0036 (508) 853-5000

115 Northeast Cutoff, Box 15036

www.allegromicro.com

Allegro MicroSystems, Inc.

High Precision, Output Pin Programmable, Linear Hall Effect Sensors

A1373 and A1374

INITIAL STATE

After system power-up, the programming logic is reset to a

known state. This is referred to as the Initial state. All the regis-

ters that have intact fuses are set to logic 0.

While in the Initial state, any VPL pulses on the VOUT pin are

ignored.

To enter the Mode Selection state, send one VPH pulse on the

VOUT pin.

MODE SELECTION STATE

This state allows the selection of the programming mode:

• Try Value Mode. In this mode, the user provisionally downloads

settings to the device registers, without blowing the bits. The user

can increment through the codes of each parameter, and evaluate the

results of various code settings.

• Blow Fuse Mode. In this mode, after downloading the settings, the

user can blow the fuses in specific registers.

• Lock Device Mode. This mode is similar to Blow Fuse mode, except

that the fuse that is blown permanently prevents any further program-

ming of any bits in the device.

To select a mode, increment through the register bitfields by

sending VPL pulses on the VOUT pin, as follows:

0 pulses – No effect

1 pulse – Try Value mode

2 pulses – Blow Fuse mode

3 pulses – Lock Device mode

This register wraps by default. This means that sending addi-

tional VPL pulses traverses the register again.

Any VPH pulse sent before a VPL pulse has no effect.

To enter the Register Selection state, after sending a valid quan-

tity of VPL pulses, send one VPH pulse on the VOUT pin.

This state allows the selection of the register containing the

bitfields to be programmed. Selecting the register corresponds to

selecting the parameter to be set. For bit codes, see the section

Programming Logic.

• QVO [VOUT(Q)] Coarse. Register for setting the range of the operat-

ing dc point (2 bits)

• QVO Fine. Register for setting the value within the range set in the

QVO Coarse register (9 bits)

• Sens. [Sensivity] Coarse. Register for setting the overall gain of the

device (2 bits)

• Sens. Fine. Register for setting the value within the range set in the

Sens. Coarse register (8 bits)

• [Sensitivity] TC Register. Register for setting the temperature coef-

ficient for the device (5 bits).

• Clamp [VOUTCLP] Bit. Register for setting the clamping voltage of

the output (2 bits)

• Polarity Bit. Register setting the polarity of the output (1 bit)

To select a register, increment through the register bitfields by

sending VPL pulses on the VOUT pin. Note that the program-

ming of registers should follow the order shown in item 7 in the

section Programming Guidelines, not the bitfield selection order

shown here. The bitfield selection order is:

0 pulses – QVO Coarse register

1 pulse – QVO Fine register

2 pulses – Sens. Coarse register

3 pulses – Sense Fine register

4 pulses – TC Register register

5 pulses – Clamp Bit register

6 pulses – Polarity Bit register

This register wraps by default.

To enter the Register Selection state, send one VPH pulse on the

VOUT pin.

BITFIELD SELECTION STATE (Write Mode)

This state allows the selection of the individual bitfields to be

programmed, in the register selected in the Register Selection

state.

In Try Value mode, the total value of the bitfields selected incre-

ments by 1 with each VPL pulse on the VOUT pin. The param-

eter being programmed changes with each additional pulse, so

measurements can be taken after each pulse to determine if the

desired result has been acquired.

In Blow Fuses mode, each bitfield to be blown must be selected

individually.

For bit codes and wrapping for these registers, see the section

Programming Logic.

To leave this state, send one VPH pulse on the VOUT pin. If the

current mode is Try Value, the bitfields remain set and the device

reverts to the Mode Selection state. If the current mode is Blow

Fuse, the selected bitfield fuse is blown, and the device reverts to

the Mode Selection state.

Programming Protocol and State Machine Description

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