RT8152F datasheet(20/24 Pages) RICHTEK

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RT8152C/D

DS8152C/D-04

April 2011

www.richtek.com

REQU, T = R1a // RNTC, T

(23)

Power Down

When VRON goes low, the RT8152C/D enters low power

shutdown mode. PGOOD is pulled low immediately and

the VSOFT ramps down with slew rate of 20

μA/CSOFT. VSEN

also ramps down following VSOFT. After VVSEN is lower than

200mV, the RT8152C/D turns off high side FETs and low

side FETs. An internal discharge resistor at VSEN will be

enabled and the analog part will be turned off.

Deeper Sleep Mode Transitions

After DPRSLPVR goes high, the RT8152C/D enters deeper

sleep mode operation. If the VIDs are set to a lower voltage

setting, the output drops at a rate determined by the load

and the output capacitance. The internal target VSOFT still

ramps as before, and UVP, OCP and OVP are masked for

μs.

Over Current Protection Setting

The RT8152C/D compares a programmable current limit

set point to the voltage from the current sense amplifier

output for Over Current Protection (OCP). The voltage

applied to OCSET pin defines the desired current limit

threshold ILIM :

VOCSET = 40 x ILIM x RSENSE

(17)

Connect a resistor voltage divider from VCC to GND, the

joint of the resistor divider is connected to OCSET pin as

shown in Figure 10. For a given ROC2, then :

(18)

OC1

OC2

OCSET

⎛⎞

=×

−

⎜⎟

⎝⎠

Figure 10. OCP Setting Without Temperature

Compensation

OCSET

VCC

ROC1

ROC2

RT8152C/D provides current limit function and over current

protection. The current limit function is triggered when

inductor current exceeds the current limit threshold ILIM

defined by VOCSET. When current limit function is tripped,

high side MOSFET will be forced off until the over current

condition is cleared.

Figure 11. OCP Setting with Temperature Compensation

OCSET

VCC

ROC1b

ROC2

ROC1a

NTC

OCSET, HOT

SENSE, HOT

OCSET, COLD

SENSE, COLD

(19)

Generally, the ROC1a must be selected to be equal to

thermistor's nominal resistance at room temperature.

Ideally, VOCSET has same temperature coefficient with

RSENSE (Inductor DCR) :

(20)

OC2

EQU, HOT

EQU, COLD

EQU, 25

OCSET, 25

) R

)

α×

−

+ − α ×

×− α

(21)

OC1b

OC2

EQU, HOT

EQU, COLD

(1) R

)

α− ×

+ α ×

−

−α

Where

SENSE, HOT

HOT

SENSE, COLD

COLD

DCR

[1 0.00393 (T

25)]

DCR

[1 0.00393 (T

25)]

α=

×+

−

×+

−

(22)

If the current limit function is triggered for 15 switching

cycles, OCP will be tripped. Once OCP is tripped, both

high side and low side MOSFET will be turn off, and the

internal discharge resistor at the VSEN pin will be enabled

to discharge output capacitors. OCP is a latched

protection, it can only be reset by cycling VRON or VCC.

If inductor DCR is used as current sense component, then

temperature compensation is recommended for proper

protection under all conditions. Figure 11 shows a typical

OCP setting with temperature compensation.

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