TLE9461ES datasheet(124/140 Pages) INFINEON

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TLE9461ES

Lite CAN SBC Family

Serial Peripheral Interface

Datasheet

124

Rev.1.1

2019-09-27

Note:

WK_LVL_STAT is updated in SBC Normal and Stop Mode and also in SBC Init and Restart Mode. See

below for exceptions. In Cyclic Sense or wake mode, the registers contain the sampled level, i.e. the

registers are updated after every sampling.

Note:

GPIO_LVL is updated in SBC Normal and Stop Mode and also in SBC Init and Restart Mode if

configured as wake input, low-side switch or high-side switch without Cyclic Sense (in case of FO

configuration the status is flagged with the FAILURE bit). In case the respective feature is disabled

then the WK_LVL_STAT bit will not be updated.

Note:

In case the HV measurement function is enabled (WK_MEAS=1), then the bits WK_LVL and GPIO_LVL

are not updated and reset.

WK_LVL_STAT

WK Input Level (Address 100 1000B)

POR / Soft Reset Value: xx0x 000xB;

Restart Value: xx0x 000xB

SBC_DEV_LVL CFG0_STATE

Reserved

GPIO_LVL

Reserved

WK_LVL

Field

Bits

Type

Description

SBC_DEV

_LVL

Status of SBC Operating Mode at TEST Pin

, User Mode activated

, SBC Development Mode activated

CFG0_STATE 6r

Device Configuration Status on pin INTN

, No external pull-up resistor connected on INTN (Config 2/4)

, External pull-up resistor connected on INTN (Config 1/3)

Reserved

Reserved, always reads as 0

GPIO_LVL

Status of GPIO if configured as GPIO (WK, LS or HS function)

, Low Level (=0)

, High Level (=1)

Reserved

3:1

Reserved, always reads as 0

WK_LVL

Status of WK

, Low Level (=0)

, High Level (=1)

TLE9461ES Datasheet(PDF) 124 Page - Infineon Technologies AG

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