| Electronic Components Datasheet Search |
|
LM76005 Datasheet(PDF) 34 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
LM76005 Datasheet(HTML) 34 Page - Texas Instruments |
|
34 / 42 page ![]() 10 12 14 16 18 20 22 24 26 28 30 20 30 40 50 60 70 80 1W @0 fpm - 2layer 1W @0 fpm - 4layer 2W @0 fpm - 2layer 2W @0 fpm - 4layer Copper Area 30mm × 30mm 40mm × 40mm 50mm × 50mm 70mm ×70mm 34 LM76005-Q1 SNVSBK6 – FEBRUARY 2020 www.ti.com Product Folder Links: LM76005-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Layout Guidelines (continued) TJ = PD × RθJA + TA where • TJ = junction temperature in °C • PD = VIN × IIN × (1 − efficiency) − 1.1 × IOUT × DCR • DCR = inductor DC parasitic resistance in Ω • RθJA = junction-to-ambient thermal resistance of the device in °C/W • TA = ambient temperature in °C. (31) The maximum operating junction temperature of the LM76005-Q1 is 125°C. RθJA is highly related to PCB size and layout, as well as environmental factors such as heat sinking and air flow. Figure 41 shows measured results of RθJA with different copper area on a 2-layer board and a 4-layer board. Figure 41. Measured RθJA versus PCB Copper Area on a 2-Layer Board and a 4-Layer Board 10.1.4 Feedback Resistors To reduce noise sensitivity of the output voltage feedback path, it is important to place the resistor divider and CFF close to the FB pin, rather than close to the load. The FB pin is the input to the error amplifier, so it is a high impedance node and very sensitive to noise. Placing the resistor divider and CFF closer to the FB pin reduces the trace length of FB signal and reduces noise coupling. The output node is a low impedance node, so the trace from VOUT to the resistor divider can be long if short path is not available. If voltage accuracy at the load is important, make sure voltage sense is made at the load. Doing so corrects for voltage drops along the traces and provide the best output accuracy. The voltage sense trace from the load to the feedback resistor divider must be routed away from the SW node path, the inductor, and VIN path to avoid contaminating the feedback signal with switch noise, while also minimizing the trace length. This is most important when high value resistors are used to set the output voltage. TI recommends routing the voltage sense trace on a different layer than the inductor, SW node, and VIN path, such that there is a ground plane in between the feedback trace and inductor / SW node / VIN polygon. This provides further shielding for the voltage feedback path from switching noises. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |