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LM76005 Datasheet(PDF) 8 Page - Texas Instruments |
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LM76005 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 42 page  8 LM76005-Q1 SNVSBK6 – FEBRUARY 2020 www.ti.com Product Folder Links: LM76005-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated (1) Ensured by design 6.6 Timing Characteristics MIN NOM MAX UNIT CURRENT LIMITS AND HICCUP NOC (1) Number of switching cycles before hiccup is tripped 128 Cycles tOC Overcurrent hiccup retry delay time 46 ms SOFT START (SS/TRK PIN) tSS Internal soft-start time CSS = OPEN, from EN rising edge to PGOOD rising edge 3.5 6.3 ms POWER GOOD (PGOOD PIN) and OVERVOLTAGE PROTECTION tPGOOD_RISE PGOOD rising edge deglitch delay 80 140 200 µs tPGOOD_FALL PGOOD falling edge deglitch delay 80 140 200 µs 6.7 Switching Characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PWM LIMITS (SW PINS) tON-MIN Minimum switch on-time 65 95 ns tOFF-MIN Minimum switch off-time 95 130 ns tON-MAX Maximum switch on-time HS timeout in dropout 3.8 8 11.4 µs OSCILLATOR (RT and SYNC PINS) fOSC Internal oscillator frequency RT = Open 440 500 560 kHz fADJ Minimum adjustable frequency by RT or SYNC RT =133 kΩ, 0.1% 270 300 330 kHz Maximum adjustable frequency by RT or SYNC RT = 79.07 kΩ, 0.1% 440 500 560 kHz VSYNC_HIGH Sync input high level threshold 2 V VSYNC_LOW Sync input low level threshold 0.4 V VMODE_HIGH Mode input high level threshold for FPWM 0.42 V VMODE_LOW Mode input low level threshold for AUTO mode 0.4 V tSYNC_MIN Sync input minimum on- and off-time 80 ns 6.8 System Characteristics The following specifications apply to the circuit found in the typical schematic with appropriate modifications. These parameters are not tested in production and represent typical performance only. Unless otherwise stated the following conditions apply: TA = 25°C, VIN = 24 V, VOUT = 3.3 V, fSW = 500 kHz. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VFB_PFM Output voltage offset at no load in auto mode VIN = 3.8 V to 36 V, VSYNC = 0 V, auto mode IOUT = 0 A 2% Vdrop Minimum input to output voltage differential to maintain specified accuracy VOUT = 5 V, IOUT = 1.5 A, fSW = 400 kHz 0.65 V IQ_SW Operating quiescent current (switching) VEN = 3.3 V, IOUT = 0 A, RT = open, VBIAS = VOUT = 3.3 V, RFBT = 1 Meg 15 µA IPEAK_MIN Minimum inductor peak current VSYNC = 0 V, IOUT = 10 mA 1 A IBIAS_SW Operating quiescent current from external VBIAS (switching) fSW = 500 kHz, IOUT = 1 A 7 mA DMAX Maximum switch duty cycle While in frequency foldback 97.5% tDEAD Dead time between high-side and low-side MOSFETs 4 ns |
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