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RT1050 Datasheet(PDF) 1 Page - NXP Semiconductors |
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RT1050 Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 110 page ![]() NXP Semiconductors Data Sheet: Technical Data Document Number: IMXRT1050IEC Rev. 1.4, 01/2020 MIMXRT1051CVL5A MIMXRT1052CVL5A MIMXRT1051CVL5B MIMXRT1052CVL5B MIMXRT1051CVJ5B MIMXRT1052CVJ5B Package Information Plastic Package 196-pin MAPBGA, 10 x 10 mm, 0.65 mm pitch 196-pin MAPBGA, 12 x 12 mm, 0.8 mm pitch Ordering Information See Table 1 on page 5 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. 1 i.MX RT1050 introduction The i.MX RT1050 is a new processor family featuring NXP’s advanced implementation of the Arm Cortex®-M7 core, which operates at speeds up to 528 MHz to provide high CPU performance and best real-time response. The i.MX RT1050 processor has 512 KB on-chip RAM, which can be flexibly configured as TCM or general-purpose on-chip RAM. The i.MX RT1050 integrates advanced power management module with DCDC and LDO that reduces complexity of external power supply and simplifies power sequencing. The i.MX RT1050 also provides various memory interfaces, including SDRAM, RAW NAND FLASH, NOR FLASH, SD/eMMC, Quad SPI, and a wide range of other interfaces for connecting peripherals, such as WLAN, Bluetooth™, GPS, displays, and camera sensors. The i.MX RT1050 also has rich audio and video features, including LCD display, basic 2D graphics, camera interface, SPDIF, and I2S audio interface. The i.MX RT1050 Crossover Processors Data Sheet for Industrial Products 1. i.MX RT1050 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 5 2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1. Special signal considerations . . . . . . . . . . . . . . . 15 3.2. Recommended connections for unused analog interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 18 4.2. System power and clocks . . . . . . . . . . . . . . . . . . 25 4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 36 4.5. External memory interface . . . . . . . . . . . . . . . . . 41 4.6. Display and graphics . . . . . . . . . . . . . . . . . . . . . . 51 4.7. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 4.8. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.9. Communication interfaces . . . . . . . . . . . . . . . . . . 64 4.10. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 79 5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 79 5.2. Boot device interface allocation . . . . . . . . . . . . . . 79 6. Package information and contact assignments . . . . . . . 84 6.1. 10 x 10 mm package information . . . . . . . . . . . . 84 6.2. 12 x 12 mm package information . . . . . . . . . . . . 96 7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 |
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