VSC7440 datasheet(372/444 Pages) MICROSEMI

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VCore-III System and CPU Interfaces

VMDS-10492 VSC7440 Datasheet Revision 4.2

355

4.8.9

Serial GPIO Controller

The device features one serial GPIO (SIO) controller. By using a serial interface, the SIO controller

significantly extends the number of available GPIOs with a minimum number of additional pins on the

device. The primary purpose of the SIO controller is to connect control signals from SFP modules and to

act as an LED controller.

Each SIO controller supports up to 128 serial GPIOs (SGPIOs) organized into 32 ports, with four SGPIOs

per port.

The following table lists the registers associated with the SIO controller.

The following table lists the SIO controller pins, which are overlaid functions on GPIO pins. For more

information about overlaid functions on the GPIOs for these signals, see GPIO Overlaid Functions,

page 352.

The SIO controller works by shifting SGPIO values out on SG0_DO though a chain of shift registers on

the PCB. After shifting a configurable number of SGPIO bits, the SIO controller asserts SG0_LD, which

causes the shift registers to apply the values of the shifted bits to outputs. The SIO controller can also

read inputs while shifting out SGPIO values on SG0_DO by sampling the SG0_DI input. The values

sampled on SG0_DI are made available to software.

SFP15_SD/GPIO

Parallel signal detect 15

Table 262 •

SIO Registers

Description

DEVCPU_GCB::SIO_INPUT_DATA

Input data

DEVCPU_GCB::SIO_CFG

General configuration

DEVCPU_GCB::SIO_CLOCK

Clock configuration

DEVCPU_GCB::SIO_PORT_CFG

Output port configuration

DEVCPU_GCB::SIO_PORT_ENA

Port enable

DEVCPU_GCB::SIO_PWM_CFG

PWM configuration

DEVCPU_GCB::SIO_INTR_POL

Interrupt polarity

DEVCPU_GCB::SIO_INTR_RAW

Raw interrupt status

DEVCPU_GCB::SIO_INTR_TRIGGER0

Interrupt trigger mode 0 configuration

DEVCPU_GCB::SIO_INTR_TRIGGER1

Interrupt trigger mode 1 configuration

DEVCPU_GCB::SIO_INTR

Currently interrupting SGPIOs

DEVCPU_GCB::SIO_INTR_ENA

Interrupt enable

DEVCPU_GCB::SIO_INTR_IDENT

Currently active interrupts

Table 263 •

SIO Controller Pins

Pin Name

I/O

Description

SG0_CLK/GPIO

SIO clock output, frequency is configurable using

SIO_CLOCK.SIO_CLK_FREQ.

SG0_DO/GPIO

SIO data output.

SG0_DI/GPIO

SIO data input.

SG0_LD/GPIO

SIO load data, polarity is configurable using SIO_CFG.SIO_LD_POLARITY.

Table 261 •

Parallel Signal Detect Pins (continued)

I/O

Description

VSC7440 Datasheet(PDF) 372 Page - Microsemi Corporation

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