PMS133 datasheet(8/106 Pages) PADAUK

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PMS133/PMS134

8bit OTP MCU with 12-bit ADC

Page 8 of 106

PDK-DS-PMS133/134-EN_V103 – Nov. 13, 2018

Revision History:

Revision

Date

Description

0.01

2017/09/11

st version

0.02

2017/09/30

Amend Section 1.2 System Features

Amend Chapter 2 General Description and Block Diagram

Amend Chapter 3 Pin Assignment and Description

Amend Section 4.1 AC/DC Device Characteristics

Amend Section 5.1 Program Memory – OTP

Amend Section 5.4.3 IHRC Frequency Calibration and System Clock

Amend Section 5.4.4 External Crystal Oscillator

Amend Section 5.5.2 Using the comparator

Add Section 5.6 VDD/2 LCD Bias Voltage Generator

10. Add Fig.9 Using VDD/2 LCD Bias Voltage Generator

11. Amend Section 5.7 16-bit Timer

12. Amend Section 5.8.2 Using the Timer2 to generate 8-bit PWM waveform

13. Amend Section 5.9 11-bit PWM Generator

14. Amend Section 5.12.1 Power-Save mode (“stopexe”)

15. Amend Fig.18 Hardware diagram of IO buffer

16. Amend Fig.19 ADC Block Diagram

17. Amend Section 5.15.4 Configure the analog pins

18. Amend Section 5.15.5 Using the ADC

19. Amend Section 6.3 Clock Mode Register

20. Amend Section 6.4 Interrupt Enable Register

21. Amend Section 6.5 Interrupt Request Register

22. Amend Section 6.10 Interrupt Edge Select Register

23. Amend Section 6.11 Port A Digital Input Enable Register

24. Amend Section 6.12 Port B Digital Input Enable Register

25. Amend Section 6.13 Port C Digital Input Enable Register

26. Amend Section 6.23

ADC Control Register

27. Amend Section 6.25 ADC Regulator Control Register

28. Amend Section 6.28 MISC Register

29. Delete Section 6.29 MISC2 Register

30. Amend Section 6.31 Timer2 Control Register

31. Amend Section 6.33 Timer2 Scalar Register

32. Amend Section 6.37 Timer3 Scalar Register

33. Amend Section 6.39 PWMG0 control Register

34. Amend Section 6.45 PWMG1 control Register

35. Amend Section 6.51 PWMG2 control Register

36. Amend Chapter 8 Code Options

37. Amend Section 9.2.1 IO pin usage and setting

38. Amend Section 9.2.2 Interrupt

39. Amend Section 9.2.7 LVR

40. Amend Section 9.2.9 RAM definition

41. Amend Section 9.3 Using ICE

1.03

2018/11/13

Updated company address & Tel No.

Amend Section 1.1 Special Features

Amend Section 1.2: System Features

Amend Section 1.3: CPU Features

Amend Chapter 2: Block Diagram

Add AVDD, AGND and PA5 Pull-up resistor in Chapter 3

Amend Section 4.1: AC/DC Device Characteristics

Amend Section 4.3 to Section 4.15

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