PMS133 datasheet(3/106 Pages) PADAUK

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PMS133/PMS134

8bit OTP MCU with 12-bit ADC

Page 3 of 106

PDK-DS-PMS133/134-EN_V103 – Nov. 13, 2018

Table of content

1. Features ............................................................................................................................... 10

1.1.

Special Features ...................................................................................................................10

1.2.

System Features...................................................................................................................10

1.3.

CPU Features .......................................................................................................................10

1.4.

Package Information .............................................................................................................11

2. General Description and Block Diagram .......................................................................... 12

3. Pin Assignment and Description ...................................................................................... 13

4. Device Characteristics ....................................................................................................... 23

4.1.

AC/DC Device Characteristics ..............................................................................................23

4.2.

Absolute Maximum Ratings...................................................................................................25

4.3.

Typical ILRC frequency vs. VDD ...........................................................................................25

4.4.

Typical IHRC frequency deviation vs. VDD (calibrated to 16MHz).........................................26

4.5.

Typical ILRC Frequency vs. Temperature .............................................................................26

4.6.

Typical IHRC Frequency vs. Temperature (calibrated to 16MHz)..........................................27

4.7.

Typical operating current vs. VDD @ system clock = ILRC/n ................................................27

4.8.

Typical operating current vs. VDD @ system clock = IHRC/n ...............................................28

4.9.

Typical operating current vs. VDD @ system clock = 4MHz EOSC / n ..................................28

4.10.

Typical operating current vs. VDD @ system clock = 32KHz EOSC / n.................................29

4.11.

Typical operating current vs. VDD @ system clock = 1MHz EOSC / n ..................................29

4.12.

Typical IO driving current (IOH) and sink current (IOL) .............................................................30

4.13.

Typical IO input high/low threshold voltage (VIH/VIL) ..............................................................32

4.14.

Typical resistance of IO pull high device ...............................................................................32

4.15.

Typical power down current (IPD) and power save current (IPS)..............................................33

4.16.

Timing charts for boot up conditions......................................................................................34

5. Functional Description....................................................................................................... 35

5.1.

Program Memory - OTP........................................................................................................35

5.2.

Boot Procedure .....................................................................................................................35

5.3.

Data Memory - SRAM ...........................................................................................................36

5.4.

Oscillator and clock ...............................................................................................................36

5.4.1.

Internal High RC oscillator and Internal Low RC oscillator .........................................36

5.4.2.

Chip calibration..........................................................................................................36

5.4.3.

IHRC Frequency Calibration and System Clock ........................................................37

5.4.4.

External Crystal Oscillator .........................................................................................38

5.4.5.

System Clock and LVR level .....................................................................................40

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