NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

8 / 20

Pin

Symbol

Type

Definition

2

VSUP2

A_IN

Second power supply. Protected by the external reverse battery protection diode used

for VSUP1. VSUP1 and VSUP2 must be connected together externally.

3

VSENSE

A_IN

Sensing of the battery voltage. Must be connected prior to the reverse battery

protection diode.

4

VSUP3

A_IN

Third power supply dedicated to the device supply. Protected by the external reverse

battery protection diode used for VSUP1. Must be connected between the reverse

protection diode and the input PI filter.

LIN

A_IN/OUT

LIN single-wire bus transmitter and receiver

or FS1B

D_OUT

Second output of the safety block (active low). The pin is asserted low at start-up and

when a fault condition is detected, with a configurable delay or duration versus FS0B

output terminal. Open drain structure.

5

LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B is not,

and vice versa. If neither LIN, nor FS1B functions are used, this pin must be left open.

6

GND_COM

GROUND

Dedicated ground for physical layers

7

CAN_5V

A_OUT

Output voltage for the embedded CAN FD interface

8

CANH

A_IN/OUT

CAN output high. If CAN function is not used, this pin must be left open.

9

CANL

A_IN/OUT

CAN output low. If CAN function is not used, this pin must be left open.

10

IO_4

D_IN

A_OUT

Can be used as digital input (load dump proof) with wake-up capability or as an output

gate driver

Digital input: Pin status can be read through the SPI. Can be used to monitor error

signals from another IC for safety purposes (when used in conjunction with IO_5).

Wake-up capability: Can be selectable to wake-up on edges or levels

Output gate driver: Can drive a logic level low-side NMOS transistor. Controlled by

the SPI.

IO_5/VKAM

A_IN

D_IN

A_OUT

Can be used as digital input with wake-up capability or as an analog output providing

keep alive memory supply in low-power mode.

Analog input: Pin status can be read through the MUX output terminal

Digital input: Pin status can be read through the SPI. Can be used to monitor error

signals from another IC for safety purposes (when used in conjunction with IO_4).

Wake-up capability: Can be selectable to wake-up on edges or levels

Supply output: Provide keep alive memory supply in low-power mode

11

VKAM can be enabled or disabled by default at power up. The differentiation is made by part numbers.

12

IO_0

A_IN

D_IN

Can be used as analog or digital input (load dump proof) with wake-up capability

(selectable)

Analog input: Pin status can be read through the MUX output terminal

Digital input: Pin status can be read through the SPI

Wake-up capability: Can be selectable to wake-up on edges or levels

13

FCRBM

A_IN

Feedback core resistor bridge monitoring: For safety purposes, this pin is used to

directly to FB_CORE.

14

FS0B

D_OUT

First output of the safety block (active low). The pin is asserted low at start-up and

when a fault condition is detected. Open drain structure.

15

DEBUG

D_IN

Debug mode entry input

16

AGND

GROUND

Analog ground connection

17

MUX_OUT

A_OUT

Multiplexed output to be connected to a MCU ADC. Selection of the analog parameter

is available at MUX-OUT through the SPI.

18

19

IO_2:3

D_IN

Digital input pin with wake-up capability (logic level compatible)

Digital input: Pin status can be read through the SPI. Can be used to monitor FCCU

error signals from MCU for safety purposes.

Wake-up capability: Can be selectable to wake-up on edges or levels