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L64734 Datasheet(PDF) 6 Page - LSI Computer Systems |
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L64734 Datasheet(HTML) 6 Page - LSI Computer Systems |
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6 / 48 page ![]() 6 L64733/L64734 Tuner and Satellite Receiver Chipset Features and Benefits System Features • Direct down-conversion • Integrated programmable cut-off low-pass filters for variable-rate operation • Dual AGC for optimizing performance with respect to intermodulation and noise • Integrated synthesizer • Integrated quadrature amplitude and phase imbalance compensation • RF loop-through Chipset Features • Supports DVB and DSS system specifications • BPSK/QPSK demodulation rates from 1 to 45 Mbaud • Matched filter (square root raised cosine filter with roll-off factor of 20% or 35%) • Anti-aliasing filters for operation from 1 to 45 Mbaud without switching external SAW filters or the need for low-pass filters • On-chip digital clock synchronization • On-chip digital carrier synchronization, featuring a frequency sweep capability for signal acquisition • Auto-acquisition demodulator mode and tuner control through an on-chip microcontroller • Integrated Phase-Locked Loop (PLL) for clock synthesis, allowing the use of a fundamental mode crystal • Fast channel switching mode • Power estimation for AGC control • Programmable Viterbi decoder module for rates 1/2, 2/3, 3/4, 5/6, 6/7, 7/8 • Reed-Solomon decoder (204/188), (146/130) • Auto-synchronization for Viterbi decoder |
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