ED14R126-12AMBTEL datasheet(20/51 Pages) EOREX

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Differential swing requirements for clock (CK - CK) and strobe (DQS-DQS)

Differential AC and DC Input Levels

Symbol

Parameter

DDR3-800, 1066, 1333, 1600

Unit Notes

Min

Max

VIHdiff

Differential input high

+ 0.200

Note 3

VILdiff

Differential input logic low

Note 3

- 0.200

VIHdiff (ac)

Differential input high ac

2 x (VIH (ac) - Vref)

Note 3

VILdiff (ac)

Differential input low ac

Note 3

2 x (VIL (ac) - Vref)

Notes:

1. Used to define a differential signal slew-rate.

2. For CK - CK use VIH/VIL (ac) of AADD/CMD and VREFCA; for DQS - DQS, DQSL, DQSL, DQSU, DQSU use VIH/VIL

(ac) of DQs and VREFDQ; if a reduced ac-high or ac-low levels is used for a signal group, then the reduced level

applies also here.

3. These values are not defined; however, the single-ended signals Ck, CK, DQS, DQS, DQSL, DQSL, DQSU, DQSU

need to be within the respective limits (VIH (dc) max, VIL (dc) min) for single-ended signals as well as the limita-

tions for overshoot and undershoot. Refer to "Overshoot and Undershoot Specifications" on page 43.

Allowed time before ringback (tDVAC) for CK - CK and DQS - DQS

Slew Rate [V/ns]

tDVAC [ps]

@ |VIH/Ldiff (ac)| = 350mV

tDVAC [ps]

@ |VIH/Ldiff (ac)| = 300mV

min

max

min

max

> 4.0

175

4.0

170

3.0

167

2.0

163

1.8

162

1.6

161

1.4

159

1.2

155

1.0

150

< 1.0

150

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