ED14R126-12AMBTEL datasheet(4/51 Pages) EOREX

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ED382R517-2G4SA-H9R

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Pin Descriptions

Pin Name

Description

Num

ber

Pin Name

Description

Num

ber

CK0

Clock Input, positive line

ODT[1:0]

On Die Termination Inputs

CK0

Clock Input, negative line

DQ[63:0]

Data Input/Output

CK1

Clock Input, positive line

CB[7:0]

Data check bits Input/Output

CK1

Clock Input, negative line

DQS[8:0]

Data strobes

CKE[1:0]

Clock Enables

DQS[8:0]

Data strobes, negative line

RAS

Row Address Strobe

DM[8:0]/

DQS[17:9],

TDQS[17:9]

Data Masks / Data strobes,

Termination data strobes

CAS

Column Address Strobe

DQS[17:9],

TDQS[17:9]

Data strobes, negative line,

Termination data strobes

Write Enable

EVENT

Reserved for optional hardware

temperature sensing

S[3:0]

Chip Selects

TEST

Memory bus test tool (Not Con-

nected and Not Usable on DIMMs)

A[9:0],A11,

A[15:13]

Address Inputs

RESET

A10/AP

Address Input/Autoprecharge

VDD

Power Supply

A12/BC

Address Input/Burst chop

VSS

Ground

BA[2:0]

SDRAM Bank Addresses

VREFDQ

Reference Voltage for DQ

SCL

Serial Presence Detect (SPD)

Clock Input

VREFCA

Reference Voltage for CA

SDA

SPD Data Input/Output

VTT

Termination Voltage

SA[2:0]

SPD Address Inputs

VDDSPD

SPD Power

Par_In

Parity bit for the Address and

Control bus

Err_Out

Parity error found on the

Address and Control bus

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