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ATMEGA640 Datasheet(PDF) 327 Page - Microchip Technology

Part # ATMEGA640
Description  8-bit Microcontroller with 16/32/64KB In-System Programmable Flash
PDF  436 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ATMEGA640 Datasheet(HTML) 327 Page - Microchip Technology

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
DS40002211A
Notes: 1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1:0 results in maximum Boot Size. See Table 29-7 on page 320 for details.
3. See “WDTCSR – Watchdog Timer Control Register” on page 65 for details.
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits and JTAGEN Fuse.
A programmed OCDEN Fuse enables some parts of the clock system to be running in all sleep modes. This may
increase the power consumption.
Notes: 1. The default value of SUT1:0 results in maximum start-up time for the default clock source. See “System and Reset
Characteristics” on page 360 for details.
2. The default setting of CKSEL3:0 results in internal RC Oscillator @ 8MHz. See Table 10-1 on page 40 for details.
3. The CKOUT Fuse allow the system clock to be output on PORTE7. See “Clock Output Buffer” on page 47 for
details.
4. See “System Clock Prescaler” on page 47 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if Lock bit1 (LB1) is
programmed. Program the Fuse bits before programming the Lock bits.
30.2.1
Latching of Fuses
The fuse values are latched when the device enters programming mode and changes of the fuse values will have
no effect until the part leaves Programming mode. This does not apply to the EESAVE Fuse which will take effect
once it is programmed. The fuses are also latched on Power-up in Normal mode.
Table 30-4.
Fuse High Byte
Fuse High Byte
Bit No
Description
Default Value
OCDEN(4)
7
Enable OCD
1 (unprogrammed, OCD disabled)
JTAGEN
6
Enable JTAG
0 (programmed, JTAG enabled)
SPIEN(1)
5
Enable Serial Program and Data Downloading
0 (programmed, SPI prog. enabled)
WDTON(3)
4
Watchdog Timer always on
1 (unprogrammed)
EESAVE
3
EEPROM memory is preserved through the Chip
Erase
1 (unprogrammed, EEPROM not
preserved)
BOOTSZ1
2
Select Boot Size (see Table 30-9 on page 329 for
details)
0 (programmed)(2)
BOOTSZ0
1
Select Boot Size (see Table 30-9 on page 329 for
details)
0 (programmed)(2)
BOOTRST
0
Select Reset Vector
1 (unprogrammed)
Table 30-5.
Fuse Low Byte
Fuse Low Byte
Bit No
Description
Default Value
CKDIV8(4)
7
Divide clock by 8
0 (programmed)
CKOUT(3)
6
Clock output
1 (unprogrammed)
SUT1
5
Select start-up time
1 (unprogrammed)(1)
SUT0
4
Select start-up time
0 (programmed)(1)
CKSEL3
3
Select Clock source
0 (programmed)(2)
CKSEL2
2
Select Clock source
0 (programmed)(2)
CKSEL1
1
Select Clock source
1 (unprogrammed)(2)
CKSEL0
0
Select Clock source
0 (programmed)(2)



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