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CLAMPED VIDEO/RF AMPLIFIER

OPA656

300

Ω

OTA

OUT

HOLD

• Current Control

• Non−Inverting

OPA615

100

Ω

100

Ω

REF

100

Ω

300

Ω

SOTA

SAMPLE-AND-HOLD AMPLIFIER

Hold /Track

Ω

100

Ω

150

Ω

100

Ω

OTA

300

Ω

HOLD

22pF

300

Ω

OUT

SOTA

OPA615

SBOS299B – FEBRUARY 2004 – REVISED JULY 2005

Another circuit example for the preamplifier and the

clamp circuit is shown in Figure 44. The preamplifier

uses the wideband, low noise OPA656, again con-

figured in a gain of +2V/V. Here, the OPA656 has a

typical bandwidth of 200MHz with a settling time of

about 21ns (0.02%) and offers a low bias current

JFET input stage.

The video signal passes through the capacitor CB,

blocking the DC component. To restore the DC level

to the desired baseline, the OPA615 is used. The

inverting input (pin 11) is connected to a reference

voltage. During the high time of the clamp pulse, the

switching comparator (SOTA) will compare the output

of the op amp to the reference level. Any voltage

difference between those pins will result in an output

current that either charges or discharges the hold

capacitor, CHOLD. This charge creates a voltage

across the capacitor, which is buffered by the OTA.

Multiplied by the transconductance, the voltage will

cause a current flow in the collector, C, terminal of

Figure 44. Clamped Video/RF Amplifier

the OTA. This current will level-shift the OPA656 up

to the point where its output voltage is equal to the

reference voltage. This level-shift also closes the

control loop. Because of the buffer, the voltage

With a control propagation delay of 2.5ns and

across the CHOLD stays constant and maintains the

730MHz bandwidth, the OPA615 can be used advan-

baseline correction during the off-time of the clamp

tageously in a high-speed sample-and-hold amplifier.

pulse.

Figure 45 illustrates this configuration.

The external capacitor (CHOLD) allows for a wide

range of flexibility. By choosing small values, the

circuit can be optimized for a short clamping period or

with high values for a low droop rate. Another

advantage of this circuit is that small clamp peaks at

the output of the switching comparator are integrated

and do not cause glitches in the signal path.

Figure 45. Sample-and-Hold Amplifier

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