DRV102 datasheet(2/23 Pages) TI

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DRV102

SBVS009A

www.ti.com

SPECIFICATIONS

At TC = +25°C, VS = +24V, load = series diode MUR415 and 100Ω, and 4.99kΩ Flag pull-up to +5V, unless otherwise noted.

DRV102T, F

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

OUTPUT

Output Saturation Voltage, Source

IO = 1A

+1.7

+2.2

IO = 0.1A

+1.3

+1.7

Current Limit

2.7

3.4

Under-Scale Current

Leakage Current

Output Transistor Off, VS = +60V, VO = 0V

±0.01

±2mA

DIGITAL CONTROL INPUT(1)

VCTR Low (output disabled)

+1.2

VCTR High (output enabled)

+2.2

ICTR Low (output disabled)

VCTR = 0V

–80(2)

µA

ICTR High (output enabled)

VCTR = +5V

20(2)

µA

Propagation Delay: On-to-Off

0.9

µs

Off-to-On

1.8

µs

DELAY TO PWM(3)

dc to PWM Mode

Delay Equation(4)

Delay to PWM

≈ C

D • 10

6 (C

D in F)

Delay Time

CD = 0.1µF

110

Minimum Delay Time(5)

CD = 0

µs

DUTY CYCLE ADJUST

Duty Cycle Range

10 to 90

Duty Cycle Accuracy

49% Duty Cycle, RPWM = 25.5kΩ±1

±7%

vs Supply Voltage

49% Duty Cycle, VS = 8V to 60V

±1

±5%

Nonlinearity(6)

20% to 80% Duty Cycle

±2

% FSR

DYNAMIC RESPONSE

Output Voltage Rise Time

VO = 10% to 90% of VS

0.25

2.5

µs

Output Voltage Fall Time

VO = 90% to 10% of VS

0.25

2.5

µs

Oscillator Frequency

kHz

FLAG

Normal Operation

20k

Ω Pull-Up to +5V, I

O < 1.5A

+4.9

Fault(7)

Sinking 1mA

+0.2

+0.4

Sink Current

VFLAG = 0.4V

Under-Current Flag: Set

5.2

µs

Reset

µs

Over-Current Flag:

Set

5.2

µs

Reset

11.5

µs

THERMAL SHUTDOWN

Junction Temperature

Shutdown

+165

°C

Reset from Shutdown

+150

°C

POWER SUPPLY

Specified Operating Voltage

+24

Operating Voltage Range

+60

Quiescent Current

IO = 0

6.5

TEMPERATURE RANGE

Specified Range

–55

+125

°C

Storage Range

–55

+125

°C

Thermal Resistance,

7-Lead DDPAK, 7-Lead TO-220

°C/W

Thermal Resistance,

7-Lead DDPAK, 7-Lead TO-220

No Heat Sink

°C/W

NOTES: (1) Logic high enables output (normal operation). (2) Negative conventional current flows out of the terminals. (3) Constant dc output to PWM (pulse-width

modulated) time. (4) Maximum delay is determined by an external capacitor. Pulling the Delay Adjust pin low corresponds to an infinite (continuous) delay.

(5) Connecting the Delay Adjust pin to +5V reduces delay time to 3

µs. (6) V

IN at pin 3 to percent of duty cycle at pin 6. (7) A fault results from over-temperature,

over-current, or under-current conditions.

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