COP8CFE9 datasheet(33/63 Pages) NSC

33 / 63 page

7.0 Power Saving Features (Continued)

8.0 A/D Converter

This device contains a 16-channel, multiplexed input, suc-

cessive approximation, 10 bit Analog-to-Digital Converter.

Pins AV

CC and AGND are used for the voltage reference.

8.1 OPERATING MODES

It supports both Single Ended and Differential modes of

operation.

Two specific analog channel selection modes are supported.

These are as follows:

Allow any specific channel to be selected at one time.

The A/D Converter performs the specific conversion re-

quested and stops.

Allow any differential channel pair to be selected at one

time. The A/D Converter performs the specific differen-

tial conversion requested and stops.

In both Single Ended and Differential modes, there is the

capability to connect the analog multiplexor output and A/D

converter input to external pins. This provides the ability to

externally connect a common filter/signal conditioning circuit

for the A/D Converter.

The A/D Converter is supported by three memory mapped

registers: two result registers and the control register. When

the device is reset, the mode control register (ENAD) is

cleared, the A/D is powered down and the A/D result regis-

ters have unknown data.

8.1.1 A/D Control Register

The control register, ENAD, contains 4 bits for channel se-

lection, 1 bit for mode selection, 1 bit for the multiplexor

output selection, 1 bit for prescaler selection, and a Busy bit.

An A/D conversion is initiated by setting the ADBSY bit in the

ENAD control register. The result of the conversion is avail-

able to the user in the A/D result registers, ADRSTH and

ADRSTL, when ADBSY is cleared by the hardware on

completion of the conversion.

20026472

FIGURE 19. Multi-Input Wake-Up Logic

COP8CFE9 Datasheet(PDF) 33 Page - National Semiconductor (TI)