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LTC7803 Datasheet(PDF) 12 Page - Analog Devices

Part # LTC7803
Description  40V, Low IQ, 3MHz, Triple Output Buck/Buck/Boost Controller
PDF  42 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC7803 Datasheet(HTML) 12 Page - Analog Devices

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LTC7811
12
Rev. 0
For more information www.analog.com
PIN FUNCTIONS
SW2, SW1 (Pins 19, 31): Switch Node Connections
to Inductors.
BOOST2, BOOST1 (Pins 20, 30): Bootstrapped Supplies
to the Top Side Floating Drivers. Connect capacitors
between the corresponding BOOST and SW pins for
each channel. Also connect Schottky diodes between the
BOOST1 and INTVCC pins, and BOOST2 and the INTVCC
pins. Voltage swing at the BOOST1,2 pins is from INTVCC
to (VIN+INTVCC).
BG2, BG3, BG1 (Pins 21, 25, 29): High Current Gate
Drives for Bottom N-Channel MOSFETs. Voltage swing at
these pins is from ground to INTVCC.
INTVCC (Pin 22): Output of the Internal 5.1V Low Dropout
Regulator. The driver and control circuits are powered by
this supply. Must be decoupled to ground with a minimum
of 4.7μF ceramic or tantalum capacitor.
EXTVCC (Pin 23): External Power Input to an Internal LDO
Connected to INTVCC. This LDO supplies INTVCC power,
bypassing the internal LDO powered from VBIAS whenever
EXTVCC is higher than 4.7V. See INTVCC Regulators in the
Applications Information section. Do not exceed 30V on
this pin. Connect this pin to ground if the EXTVCC LDO
is not used.
VBIAS (Pin 24): Main Bias Input Supply Pin. A bypass
capacitor should be tied between this pin and ground.
BATTSNS (Pin 26): Battery Monitor Input. Connect to a
battery or other supply to use the battery monitor feature.
When the voltage on this pin is below 9.5V, BATTGOOD is
pulled to ground. Connect to ground if the battery moni-
tor feature is not used.
NC (Pins 27, 28): No Internal Connection. Float these pins
or connect to ground.
PGOOD1 (Pin 33): Open-Drain Power Good Output. The
VFB1 pin is monitored to ensure that VOUT1 is in regulation.
When VOUT1 is not within ±10% of its regulation point,
the PGOOD1 pin is pulled low.
PLLIN/SPREAD (Pin 34): External Synchronization Input
and Spread Spectrum Selection. When an external clock
is applied to this pin, the phase-locked loop will force
the rising TG1 signal to be synchronized with the ris-
ing edge of the external clock. When an external clock is
present, the regulators operate in pulse-skipping mode if
it is selected by the MODE pin, or in forced continuous
mode otherwise. When not synchronizing to an external
clock, tie this input to INTVCC to enable spread spectrum
dithering of the oscillator or to ground to disable spread
spectrum.
FREQ (Pin 40): Frequency Control Pin for the Internal
Oscillator. Connect to ground to set the switching fre-
quency to 380kHz. Connect to INTVCC to set the switch-
ing frequency to 2.25MHz. Frequencies between 100kHz
and 3MHz can be programmed using a resistor between
the FREQ pin and ground. Minimize the capacitance on
this pin.
GND (Exposed Pad Pin 41): Ground. Connects to the
sources of bottom N-channel MOSFETs and the (–)
terminal(s) of decoupling capacitors. The exposed pad
must be soldered to PCB ground for rated electrical and
thermal performance.



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