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AIS2IH Datasheet(PDF) 9 Page - STMicroelectronics |
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AIS2IH Datasheet(HTML) 9 Page - STMicroelectronics |
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9 / 63 page ![]() 2.4 Communication interface characteristics 2.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 6. SPI slave timing values Symbol Parameter Value (1) Unit Min Max tc(SPC) SPI clock cycle 100 ns fc(SPC) SPI clock frequency 10 MHz tsu(CS) CS setup time 6 ns th(CS) CS hold time 8 tsu(SI) SDI input setup time 12 th(SI) SDI input hold time 15 tv(SO) SDO valid output time 50 th(SO) SDO output hold time 9 tdis(SO) SDO output disable time 50 1. 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production. Figure 3. SPI slave timing diagram SPC CS SDI SDO tsu(CS) tv(SO) th(SO) th(SI) tsu(SI) th(CS) tdis(SO) tc(SPC) MSB IN MSB OUT LSB OUT LSB IN Note: Measurement points are done at 0.3·Vdd_IO and 0.7·Vdd_IO for both input and output ports. AIS2IH Communication interface characteristics DS12421 - Rev 4 page 9/63 |
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