AD8316ARM datasheet(15/20 Pages) AD

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REV. C

AD8316

–15–

Enable and Power-On

The AD8316 may be disabled by pulling the ENBL pin to

ground. This reduces the supply current from its nominal level

of 8.5 mA to 3

µA at 2.7 V. The logic threshold for turning on

the device is at 1.8 V at 2.7 V. A plot of the enable glitch is

shown in TPC 20. Alternatively, the device can be completely

disabled by pulling the supply voltage to ground; ENBL would be

connected to VPOS. The glitch in this mode of operation is

shown on TPC 25 and TPC 26. If VPOS is applied before the

device is enabled, a narrow glitch of less than 50 mV will result.

This is shown in TPC 31.

In both situations, the voltage on VSET should be kept below

250 mV during power-on and power-off, preventing any unwanted

transients on VOUT.

Input Coupling Options

The internal 5 pF coupling capacitor of the AD8316, along with

the low frequency input impedance of 3 k

Ω, result in a high-pass

input corner frequency of approximately 20 MHz. This sets the

minimum operating frequency. Figure 9 shows three options for

input coupling. A broadband resistive match can be implemented

by connecting a shunt resistor to ground at RFIN. This 52.3

Ω

resistor (other values can also be used to select different overall

input impedances) combines with the input impedance of the

AD8316 (3 k

Ω 1 pF) to give a broadband input impedance of

Ω. While the input resistance and capacitance (C

IN and RIN)

will vary by approximately

± 20% from device to device, the

dominance of the external shunt resistor means that the varia-

tion in the overall input impedance will be close to the tolerance

of the external resistor. This method of matching is most useful

in wideband applications or in multimode systems where there

is more than one operating frequency and those frequencies are

quite far apart.

A reactive match can also be implemented as shown in Figure 9b.

This is not recommended at low frequencies because device

tolerances will vary the quality of the match dramatically because

of the large input resistance. For low frequencies, Option 9a or

Option 9c is recommended.

In Figure 9b, the matching components are drawn as generic

reactances. Depending on the frequency, the input impedance

at that frequency, and the availability of standard value compo-

nents, either a capacitor or an inductor will be used. As in the

previous case, the input impedance at a particular frequency is

plotted on a Smith chart and matching components are chosen

(shunt or Series L, shunt or Series C) to move the impedance to

the center of the chart.

Figure 9c shows a third method for coupling the input signal

into the AD8316, applicable where the input signal is larger

than the input range of the log amp. A series resistor, connected

to the RF source, combines with the input impedance of the

AD8316 to resistively divide the input signal being applied to

the input. This has the advantage of very little power being

tapped off in RF power transmission applications.

Using the Chip Scale Package

On the underside of the chip scale package, there is an exposed

paddle. This paddle is internally connected to the chip’s ground.

For better electrical performance, this paddle should be soldered

down to the printed circuit board’s ground plane, even though

there is no thermal requirement to do so.

EVALUATION BOARD

Figures 10 and 11 show the schematics of the AD8316 MSOP and

LFCSP evaluation boards. Note that uninstalled components are

marked as open. The layout and silkscreen of the MSOP evalua-

tion board are shown in Figures 12 and 13. Apart from the slightly

smaller device footprint and number of pins, the LFCSP evalua-

tion board is identical to the MSOP board. The boards are

supply is decoupled by a single 0.1

µF capacitor. Table II details

the various configuration options of the evaluation boards.

For operation in controller mode, both jumpers, LK1 and LK2,

should be removed. OUT1 and OUT2 can be selected with SW3

in Position A and Position B, respectively. The setpoint voltage

is applied to VSET, RFIN is connected to the RF source (PA

output or directional coupler), and OUT1 or OUT2 is connected

to the gain control pins of each PA. When the AD8316 is used

in controller mode, a capacitor and a resistor must be installed

in C4, C6, and R10, R11 for loop stability. For GSM/DCS

handset power amplifiers, this capacitor should typically range

from 150 pF to 300 pF. The series resistor improves the system

phase margin at low power levels, which in turn improves the

step response in the circuit. Typically, this resistor value should

be about 1.5 k

Ω.

A quasi-measurement mode (in which the AD8316 delivers an

output voltage that is proportional to the log of the input signal)

can be implemented to establish the relationship between VSET

and RFIN with the installation of two jumpers, LK1 and LK2.

This mimics an AGC loop. To establish the transfer function of

the log amp, the RF input should be swept while the voltage on

VSET is measured, that is, the SMA connector labeled VSET

acts as an output. This is the simplest method for validating

operation of the evaluation board. When operated in this

mode, a large capacitor (0.01

µF or greater) must be installed in

C4 or C6 (set R10/R11 to 0

Ω) to ensure loop stability.

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