MCP47FVB21 datasheet(37/92 Pages) MICROCHIP

37 / 92 page

 2015 Microchip Technology Inc.

DS20005429B-page 37

MCP48FEBXX

Control and System Status Register. Each DAC has one

bit to control the gain of the DAC and three Status bits.

GAIN CONTROL AND SYSTEM STATUS REGISTER (VOLATILE) (ADDRESS 0Ah)

U-0

R/W-0 R/W-0 R/C-1

R-0

U-0

Single

—

—(1)

POR EEWA

—

Dual

—

POR EEWA

—

bit 15

bit 0

Legend:

R = Readable bit

W = Writable bit

C = Clear-able bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

= Single-channel device

= Dual-channel device

Single

Dual

bit 15-9

bit 15-10 Unimplemented: Read as ‘0’

—

bit 9

G1:

DAC1 Output Driver Gain control bits (Dual-Channel Device only)

=2x Gain

=1x Gain

bit 8

G0:

DAC0 Output Driver Gain control bits

=2x Gain

=1x Gain

bit 7

POR:

Power-on Reset (Brown-out Reset) Status bit

This bit indicates if a Power-on Reset (POR) or Brown-out Reset (BOR) event has

occurred since the last read command of this register. Reading this register clears the

state of the POR Status bit.

= A POR (BOR) event occurred since the last read of this register. Reading this register clears

this bit.

= A POR (BOR) event has not occurred since the last read of this register.

bit 6

EEWA:

EEPROM Write Active Status bit

This bit indicates if the EEPROM Write Cycle is occurring.

= An EEPROM Write Cycle is currently occurring. Only serial commands to the volatile

memory are allowed.

= An EEPROM Write Cycle is NOT currently occurring.

bit 5-0

Unimplemented:

Read as ‘0’

Note 1:

Unimplemented bit, read as ‘0’.

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