MCP47FVB21 datasheet(74/92 Pages) MICROCHIP

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MCP48FEBXX

DS20005429B-page 74

 2015 Microchip Technology Inc.

8.7

Serial Interface Communication

Times

Table 8-1 shows time/frequency of the supported

operations of the SPI serial interface for the different

serial interface operational frequencies. This, along

with the VOUT output performance (such as slew rate),

would be used to determine your application’s volatile

DAC register update rate.

TABLE 8-1:

SERIAL INTERFACE TIMES / FREQUENCIES

Command

# of Bit

Clocks

(2)

Data Update Rate

(8-bit/10-bit/12-bit)

(Data Words/Second)

Comments

Operation

Code

Mode (1)

1 MHz

10 MHz

20 MHz (3)

Write Command

00 No(4) Single

41,666

416,666

833,333

00 No(4) Continuous

24n

41,666

416,666

833,333

For 10 data words

Read Command (5)

11 No(4) Single

41,666

416,666

N.A.

11 No(4) Continuous

24n

41,666

416,666

N.A.

For 10 data words

Enable Configuration

Bit Command

Yes Single

125,000 1,250,000 2,500,000

Yes Continuous

125,000 1,250,000 2,500,000 For 10 data words

Disable Configuration

Bit Command

Yes Single

125,000 1,250,000 2,500,000

Yes Continuous

125,000 1,250,000 2,500,000 For 10 data words

Note 1:

Nonvolatile registers can only use the “Single” mode.

“n” indicates the number of times the command operation is to be repeated.

Write

command only.

If the state of the HVC pin is VIHH, then the command is ignored, but a Command Error condition

(CMDERR) will NOT be generated

This command is useful to determine when an EEPROM programming cycle has completed.

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