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AD7792 Datasheet(PDF) 4 Page - Analog Devices |
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AD7792 Datasheet(HTML) 4 Page - Analog Devices |
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4 / 18 page ![]() AD7792/AD7793 Preliminary Technical Data REV.PrF 6/04 | Page 4 Parameter AD7792/AD7793B Unit Test Conditions/Comments @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz (FS[3:0] = 10016), 60 ± 1 Hz (FS[3:0] = 10006) REFERENCE Internal Reference Initial Accuracy 1.17 ±0.01% V min/max Internal Reference Drift 5 ppm/°C typ 15 ppm/°C max Internal Reference Noise 2 µV RMS Gain = 1, Update Rate = 16.6 Hz. Includes ADC Noise. External REFIN Voltage 2.5 V nom REFIN = REFIN(+) – REFIN(–) Reference Voltage Range2 0.1 V DD V min V max Absolute REFIN Voltage Limits2 GND – 30 mV V min AVDD + 30 mV V max Average Reference Input Current 400 nA/V typ Average Reference Input Current Drift ±0.03 nA/V/°C typ Normal Mode Rejection2 Same as for Analog Inputs Common Mode Rejection Same as for Analog Inputs EXCITATION CURRENT SOURCES (IEXC1 and IEXC2) Output Current 10/200/1000 µA nom Initial Tolerance at 25°C ±5 % typ Drift 200 ppm/°C typ Initial Current Matching at 25°C ±1 % typ Matching between IEXC1 and EXC2. VOUT = 0 V Drift Matching 20 ppm/°C typ Line Regulation (VDD) 2.1 ppm/V max AVDD = 5 V ± 5%. Typically 1.25 ppm/V Load Regulation 0.3 ppm/V typ Output Compliance AVDD – 0.6 V max 10 µA or 200 µA Currents Selected AVDD – 1 V max 1 mA Currents Selected GND – 30 mV V min TEMP SENSOR Accuracy TBD °C typ BIAS VOLTAGE GENERATOR VBIAS AVDD/2 V nom VBIAS Generator Start-Up Time TBD ms/nF typ Dependent on the Capacitance on the AIN pin INTERNAL/EXTERNAL CLOCK Internal Clock Frequency 64 ±2% KHz nom Duty Cycle 50:50 % typ Drift 0.01 %/°C typ External Clock Frequency 64 KHz nom Duty Cycle 45:55 % typ LOGIC INPUTS All Inputs Except SCLK, DIN and CLK2 VINL, Input Low Voltage 0.8 V max DVDD = 5 V 0.4 V max DVDD = 3 V VINH, Input High Voltage 2.0 V min DVDD = 3 V or 5 V SCLK and DIN (Schmitt-Triggered Input)2 VT(+) 1.4/2 V min/V max DVDD = 5 V VT(–) 0.8/1.4 V min/V max DVDD = 5 V VT(+) – VT(–) 0.3/0.85 V min/V max DVDD = 5 V |
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