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APPLICATION INFORMATION

LOOP COMPENSATION AND EXTERNAL PARTS SELECTION

D-CAP™ Mode Operation

Control

Logic

and

Driver

R1

R2

+

VFB

-

DRVL

Voltage Divider

PWM

VIN

Lx

DRVH

Io

Vc

Co

ESR

RL

Ic

Switching Modulator

0.75V

+

Output Capacitor

ƒo *

1

2q

ESR

Co [

ƒsw

4

(6)

R1 [

V

OUT *

0.75

0.75

R2

(7)

TPS51117

SLVS631 – DECEMBER 2005

A buck converter system using D-CAP™ Mode can be simplified as shown in Figure 22.

Figure 22. Simplified Diagram of the Modulator

The VFB voltage is compared with the internal reference voltage after the divider resistors. The PWM comparator

determines the timing to turn on the top MOSFET. The gain and speed of the comparator is high enough to keep

the voltage at the beginning of each on cycle (or the end of off cycle) substantially constant. The DC output

voltage may have line regulation due to ripple amplitude that slightly increases as the input voltage increases.

frequency.

by capacitor chemistry. For example, specialty polymer capacitors (SP-CAP) have Co in the order of several 100

µF and ESR in range of 10 mΩ. These values make f

Although D-CAP™ Mode provides many advantages such as ease-of-use, minimum external component

configuration, and extremely short response time, due to not employing an error amplifier in the loop, a sufficient

feedback signal needs to be provided by an external circuit to reduce the jitter level. The required signal level is

The output capacitor ESR should meet this requirement.

The external component selection is simple in D-CAP™ Mode:

1. Determine the value of R1 and R2

The recommended R2 value is 10 k

Ω to 100 kΩ. Calculate R1 by Equation 7.

2. Choose R

TON

16