AT90USB646 datasheet(264/434 Pages) ATMEL

264 / 434 page

264

7593A–AVR–02/06

AT90USB64/128

This should be read only when the USB controller operates in host mode, in device mode the

value read from this bit is underterminate.

Set by hardware when the controller is in FULL-SPEED mode. Cleared by hardware when the

controller is in LOW-SPEED mode.

• 2 – Reserved

The value read from this bit is always 0. Do not set this bit.

• 1 – ID: IUD pin Flag

The value read from this bit indicates the state of the UID pin.

• 0 – VBUS: VBus Flag

The value read from this bit indicates the state of the UVBUS pin. This bit can be used in device

mode to monitor the USB bus connection state of the appication. See Section 21.11, page 261

for more details.

7-2 -

Reserved

The value read from these bits is always 0. Do not set these bits.

– IDTI: D Transition Interrupt Flag

Set by hardware when a transition (high to low, low to high) has been detected on the UID pin.

Shall be cleared by software.

• 0 – VBUSTI: IVBUS Transition Interrupt Flag

Set by hardware when a transition (high to low, low to high) has been detected on the VBUS

pad.

Shall be cleared by software.

• 7 – DPACC: DPRAM Direct Access Bit

Set this bit to directly read the content the Dual-Port RAM (DPR) data through the UEDATX or

UPDATX registers. See Section 21.7, page 258 for more details.

Clear this bit for normal operation and access the DPR through the endpoint FIFO.

• 6-3 – Reserved

The value read from these bits is always 0. Do not set these bits.

• 2- 0 – DPADD10:8: DPRAM Address High Bit

Bit

76543210

------

IDTI

VBUSTI

USBINT

Read/Write

RRRRRR

R/W

Initial Value

00000000

Bit

543

DPACC

DPADD10:8

UDPADDH

Read/Write

R/W

Initial Value

AT90USB646 Datasheet(PDF) 264 Page - ATMEL Corporation

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