AT90USB646 datasheet(263/434 Pages) ATMEL

263 / 434 page

263

7593A–AVR–02/06

AT90USB64/128

• 3-1 – Reserved

The value read from these bits is always 0. Do not set these bits.

• 0 – UVREGE: USB pad regulator Enable

Set to enable the USB pad regulator. Clear to disable the USB pad regulator.

• 7 – USBE: USB macro Enable Bit

Set to enable the USB controller. Clear to disable and reset the USB controller, to disable the

USB transceiver and to disable the USB controller clock inputs.

• 6 – HOST: HOST Bit

Set to enable the Host mode. Clear to enable the device mode.

• 5 – FRZCLK: Freeze USB Clock Bit

Set to disable the clock inputs (the ”Resume Detection” is still active). This reduces the power

consumption. Clear to enable the clock inputs.

• 4 – OTGPADE: OTG Pad Enable

Set to enable the OTG pad. Clear to disable the OTG pad.

Note that this bit can be set/cleared even if USBE=0 (this allows the VBUS detection even if the

USB macro is disable).

• 3-2 – Reserved

The value read from these bits is always 0. Do not set these bits.

• 1 – IDTE: ID Transition Interrupt Enable Bit

Set this bit to enable the ID Transition interrupt generation. Clear this bit to disable the ID Transi-

tion interrupt generation.

• 0 – VBUSTE: VBUS Transition Interrupt Enable Bit

Set this bit to enable the VBUS Transition interrupt generation.

Clear this bit to disable the VBUS Transition interrupt generation.

• 7-4 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 3 – SPEED: Speed Status Flag

Bit

321

USBE

HOST

FRZCLK

OTGPADE

IDTE

VBUSTE

USBCON

Read/Write

R/W

Initial Value

Bit

7654

----

SPEED

VBUS

USBSTA

Read/Write

RRRR

Initial Value

0000

AT90USB646 Datasheet(PDF) 263 Page - ATMEL Corporation

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