AT90USB646 datasheet(266/434 Pages) ATMEL

266 / 434 page

266

7593A–AVR–02/06

AT90USB64/128

Set to deassert the UVCON pin in order to enable the VBUS power supply generation. This bit

shall be used when the controller is in the Host mode.

Cleared by hardware immediately after the set.

• 7 – Reserved

This bit is reserved and always set.

• 6-5 – PAGE: Timer page access Bit

Set/clear to access a special timer register. See Section 21.10, page 260 for more details.

• 4-3 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 2-0 – VALUE: Value Bit

Set to initialize the new value of the timer. See Section 21.10, page 260 for more details.

• 7-6 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 5 – STOE: Suspend Time-out Error Interrupt Enable Bit

Set to enable the STOI interrupt. Clear to disable the STOI interrupt.

• 4 – HNPERRE: HNP Error Interrupt Enable Bit

Set to enable the HNPERRI interrupt. Clear to disable the HNPERRI interrupt.

• 3 – ROLEEXE: Role Exchange Interrupt Enable Bit

Set to enable the ROLEEXI interrupt. Clear to disable the ROLEEXI interrupt.

• 2 – BCERRE: B-Connection Error Interrupt Enable Bit

Set to enable the BCERRI interrupt. Clear to disable the BCERRI interrupt.

• 1 – VBERRE: VBus Error Interrupt Enable Bit

Set to enable the VBERRI interrupt. Clear to disable the VBERRI interrupt.

• 0 – SRPE: SRP Interrupt Enable Bit

Set to enable the SRPI interrupt. Clear to disable the SRPI interrupt.

Bit

PAGE

VALUE

OTGTCON

Read/Write

R/W

Initial Value

Bit

STOE

HNPERRE

ROLEEXE

BCERRE

VBERRE

SRPE

OTGIEN

Read/Write

R/W

Initial Value

AT90USB646 Datasheet(PDF) 266 Page - ATMEL Corporation

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