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ASL2500SHN Datasheet(PDF) 23 Page - NXP Semiconductors |
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ASL2500SHN Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 39 page ![]() ASL2500SHN All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved. Product data sheet Rev. 3 — 26 October 2017 23 of 39 NXP Semiconductors ASL2500SHN Two phase boost converter [1] The first SPI command after leaving the Off mode, will return 0x00h. The master initiates the command sequence. The sequence begins with CSB pin pulled low and lasts until it is asserted high. The ASL2500SHN also tolerates SPI accesses with a multiple of 16 bits. It allows a daisy chain configuration of the SPI. Table 35. SPI frame format for a transition from the device Bit Symbol Description Value Function[1] 8:15 b8:15 diagnostic register ... content of diagnostic register 7:0 b7:0 data bits ... when previous command was a valid read command, content of the register that is supposed to be read ... when previous command was a valid write command, new content of the register that was supposed to be written Fig 10. Daisy chain configuration aaa-018175 µC SDI MOSI CSB SCLK SOMI SDO ASL2500SHN ASLxxxxSHN ASLxxxxSHN SDO SDO SCLK SDI SCLK SDI SCLK CSB CSB CSB |
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