ASL2500SHN datasheet(24/39 Pages) NXP

24 / 39 page

ASL2500SHN

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 26 October 2017

24 of 39

NXP Semiconductors

ASL2500SHN

Two phase boost converter

During the SPI data transfer, the identifier byte and the actual content of the addressed

registers is returned via the SDO pin. The same happens for pure read accesses. Here

the read-only bit must be set to 1. The content of the data bytes that are transmitted to the

ASL2500SHN is ignored.

The ASL2500SHN monitors the number of data bits that are transmitted. If the number is

not 16, or a multiple of 16, then a write access is ignored and the SPI error indication bit is

set.

8.11.2 Typical use case illustration (Write/Read)

Consider a daisy chain scheme with one master connected to 4 slaves in Daisy chain

fashion. The following commands are performed during one sequence (first sequence).

• Write data 0xFF to register 0x1A Slave 1

• Read from register 0x02 of Slave 2

• Write data 0xAF to register 0x2F of Slave 3

• Read from register 0x44 of Slave 4

Fig 11. Physical parallel slave connection

aaa-018176

µC

SDI

MOSI

CSB1

SCLK

SOMI

SDO

ASL2500SHN

ASLxxxxSHN

SDO

SCLK

SDI

SCLK

SDI

SCLK

CSB2

CSB3

CSB

ASL2500SHN Datasheet(PDF) 24 Page - NXP Semiconductors

ASL2500SHN Datasheet(HTML) 24 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

Datasheet Download

Link URL