ASL2500SHN datasheet(32/39 Pages) NXP

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ASL2500SHN

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Product data sheet

Rev. 3 — 26 October 2017

32 of 39

NXP Semiconductors

ASL2500SHN

Two phase boost converter

[1]

All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to

cover the specified temperature and power supply voltage range.

tWH(S)

chip select pulse width HIGH

250

Gate driver characteristics for pin G1 and pin G2

tch(G)

gate charge time

20 % to 80 %; VVGG= 7.5 V;

Cgate = 2000 pF

tdch(G)

gate discharge time

80 % to 20 %; VVGG= 7.5 V;

Cgate = 2000 pF

Regulated voltage

terr(startup)

start-up error time

of VGG; fosc = 180 MHz

2.5

terr

error detection time

for VGG during operation;

fosc = 180 MHz

31.5

s

tfltr(ov)

output voltage filter time

for bit Vout1_ok and Vout2_ok;

fosc = 180 MHz

31.5

s

Table 44.

Dynamic characteristics …continued

Min and Max values are specified for the following conditions: VBAT = 5.5 V to 40 V, VEN = 4.5 V to 5.5 V, VVCC = 4.5 V to 5.5

V and Tj = 40 °C to +175 °C[1]. All voltages are defined with respect to ground, positive currents flow into the IC. Typical

values are given at VVIN = 40 V. VEN = 5 V, VVCC = 5 V and Tj = 25 °C unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fig 13. SPI timing diagram

aaa-017537

CSB

SCLK

SDI

SDO

FLOATING

LSB

b15

MSB

b15

MSB

tWH(S)

tSPILAG

tSPILEAD

tclk(H)

tclk(L)

tSU(D)

th(D)

tv(Q)

tclk

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