| Electronic Components Datasheet Search |
|
DLP160AP Datasheet(PDF) 32 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DLP160AP Datasheet(HTML) 32 Page - Texas Instruments |
|
32 / 41 page ![]() 9.3 Power Supply Sequencing Requirements A. Refer to Table 9-1 and Figure 9-2 for critical power-up sequence delay requirements. B. To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than specified in Section 6.4. OEMs may find that the most reliable way to ensure this is to power VOFFSET prior to VBIAS during power-up and to remove VBIAS prior to VOFFSET during power-down. Refer to Table 9-1 and Figure 9-2 for power-up delay requirements. C. To prevent excess current, the supply voltage delta |VBIAS – VRESET| must be less than the specified limit shown in Section 6.4. D. When system power is interrupted, the DLPA2000/2005 initiates hardware power-down that disables VBIAS, VRESET and VOFFSET after the micromirror park sequence. E. Drawing is not to scale and details are omitted for clarity. Figure 9-1. Power Supply Sequencing Requirements (Power Up and Power Down) DLP160AP DLPS226 – OCTOBER 2021 www.ti.com 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: DLP160AP |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |