7 Detailed Description

7.1 Overview

The is a 0.16-inch diagonal spatial light modulator of aluminum micromirrors. Pixel array size is 640 columns

by 360 rows in a square grid pixel arrangement. The electrical interface is sub low voltage differential signaling

(SubLVDS) data.

The is part of the chipset comprised of the DMD, the DLPC3420ZVB display controller, and the DLPA2000/2005

PMIC/LED driver. To ensure reliable operation, the DMD must always be used with the DLPC3420ZVB display

controller and the DLPA2000/2005 PMIC/LED drivers.

7.2 Functional Block Diagram

Voltages

Word Lines

Bit Lines

SRAM

Voltage

Generators

Row

Control

Control

Column Read

Low Speed Interface

Misc

Control

Column Write

High Speed Interface

(639, 359)

(0,0)

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DLP160AP

DLPS226 – OCTOBER 2021

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