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MM9Z1 Datasheet(PDF) 68 Page - NXP Semiconductors |
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MM9Z1 Datasheet(HTML) 68 Page - NXP Semiconductors |
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68 / 452 page ![]() 68 NXP Semiconductors MM9Z1_638 FUNCTIONAL DESCRIPTION AND APPLICATION INFORMATION 0xAC COMP_VSG (hi) R 0 0 0 0 0 0 VSGC Gain voltage compensation vsense channel W COMP_VSG (lo) R VSGC Gain voltage compensation vsense channel W 0xAE COMP_TVSG (hi) R 0 0 0 TVSGCP Voltage gain temp compensation above 25 °C W COMP_TVSG (lo) R 0 0 0 TVSGCN Voltage gain temp compensation below 25 °C W 0xB0 COMP_IG4 (hi) R 0 0 0 0 0 0 IGC4 Gain current compensation W COMP_IG4 (lo) R IGC4 Gain current compensation W 0xB2 COMP_TIG4 (hi) R 0 0 0 TIGC4P Gain current compensation above 25 °C W COMP_TIG4 (lo) R 0 0 0 TIGC4N Gain current compensation below 25 °C W 0xB4 COMP_IG16 (hi) R 0 0 0 0 0 0 IGC16 Gain current compensation W COMP_IG16 (lo) R IGC16 Gain current compensation W 0xB6 COMP_TIG16 (hi) R 0 0 0 TIGC16P Gain current compensation above 25 °C W COMP_TIG16 (lo) R 0 0 0 TIGC16N Gain current compensation below 25 °C W 0xB8 COMP_IG64 (hi) R 0 0 0 0 0 0 IGC64 Gain current compensation W COMP_IG64 (lo) R IGC64 Gain current compensation W 0xBA COMP_TIG64 (hi) R 0 0 0 TIGC64P Gain current compensation above 25 °C W COMP_TIG64 (lo) R 0 0 0 TIGC64N Gain current compensation below 25 °C W 0xBC COMP_IG256 (hi) R 0 0 0 0 0 0 IGC256 Gain current compensation W COMP_IG256 (lo) R IGC256 Gain current compensation W Table 60. Analog die registers - 0x0E00–0x0EFF D2D blocking access (D2DI) 0x0F00–0x0FFF D2D non blocking access (D2DI) Offset(73) Name 7 6 5 4 3 2 1 0 |
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